XMC1200 AB-Step Microcontroller Series for Industrial Applications

XMC1200 AB-Step Microcontroller Series for Industrial Applications XMC1000 Family ARM® Cortex®-M0 32-bit processor core Data Sheet V1.8 2016-09 Microcontrol lers

Edition 2016-09 Published by Infineon Technologies AG 81726 Munich, Germany © 2016 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

XMC1200 AB-Step Microcontroller Series for Industrial Applications XMC1000 Family ARM® Cortex®-M0 32-bit processor core Data Sheet V1.8 2016-09 Microcontrol lers

XMC1200 AB-Step XMC1000 Family XMC1200 Data Sheet Revision History: V1.8 2016-09 Previous Version: V1.7 2016-09 Page Subjects Page 32, In Absolute Maximum Ratings renamed parameter VCM to VINP2, as the Page 33 limitation is related to most P2 pins, also if no ACMP is available. Clarified limit to pins P2.[1,2,6:9,11] in Overload specification. Trademarks C166™, TriCore™, XMC™ and DAVE™ are trademarks of Infineon Technologies AG. ARM®, ARM Powered® and AMBA® are registered trademarks of ARM, Limited. Cortex™, CoreSight™, ETM™, Embedded Trace Macrocell™ and Embedded Trace Buffer™ are trademarks of ARM, Limited. We Listen to Your Comments Is there any information in this document that you feel is wrong, unclear or missing? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: mcdocu.comments@infineon.com Data Sheet V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family Table of Contents Table of Contents 1 Summary of Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2 Device Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.3 Device Type Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.4 Chip Identification Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2 General Device Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.1 Logic Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.2 Pin Configuration and Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.2.1 Package Pin Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.2.2 Port I/O Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2.2.3 Hardware Controlled I/O Function Description . . . . . . . . . . . . . . . . . . . 25 3 Electrical Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.1 General Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.1.1 Parameter Interpretation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.1.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.1.3 Pin Reliability in Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3.1.4 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 3.2 DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3.2.1 Input/Output Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3.2.2 Analog to Digital Converters (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 3.2.3 Out of Range Comparator (ORC) Characteristics . . . . . . . . . . . . . . . . . 44 3.2.4 Analog Comparator Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 3.2.5 Temperature Sensor Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 47 3.2.6 Power Supply Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 3.2.7 Flash Memory Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 3.3 AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 3.3.1 Testing Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 3.3.2 Power-Up and Supply Monitoring Characteristics . . . . . . . . . . . . . . . . 55 3.3.3 On-Chip Oscillator Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 3.3.4 Serial Wire Debug Port (SW-DP) Timing . . . . . . . . . . . . . . . . . . . . . . . 59 3.3.5 SPD Timing Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 3.3.6 Peripheral Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 3.3.6.1 Synchronous Serial Interface (USIC SSC) Timing . . . . . . . . . . . . . . 61 3.3.6.2 Inter-IC (IIC) Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 3.3.6.3 Inter-IC Sound (IIS) Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . 66 4 Package and Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 4.1 Package Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 4.1.1 Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 4.2 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Data Sheet 5 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family Table of Contents 5 Quality Declaration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Data Sheet 6 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family About this Document About this Document This Data Sheet is addressed to embedded hardware and software developers. It provides the reader with detailed descriptions about the ordering designations, available features, electrical and physical characteristics of the XMC1200 series devices. The document describes the characteristics of a superset of the XMC1200 series devices. For simplicity, the various device types are referred to by the collective term XMC1200 throughout this document. XMC1000 Family User Documentation The set of user documentation includes: • Reference Manual – decribes the functionality of the superset of devices. • Data Sheets – list the complete ordering designations, available features and electrical characteristics of derivative devices. • Errata Sheets – list deviations from the specifications given in the related Reference Manual or Data Sheets. Errata Sheets are provided for the superset of devices. Attention: Please consult all parts of the documentation set to attain consolidated knowledge about your device. Application related guidance is provided by Users Guides and Application Notes. Please refer to http://www.infineon.com/xmc1000 to get access to the latest versions of those documents. Data Sheet 7 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family Summary of Features 1 Summary of Features The XMC1200 devices are members of the XMC1000 Family of microcontrollers based on the ARM Cortex-M0 processor core. The XMC1200 series devices are optimized for LED Lighting and Human-Machine interface (HMI) applications. Analog system Cortex-M0 SWD Debug system EVR 2 x DCO CPU NVIC SPD Temperature sensor ANACTRL SFRs AHB to APB PRNG Bridge PAU AHB-Lite Bus Flash SFRs 200k + 0.5k1) PORTS CCU40 ACMP & Flash ORC 16k SRAM WDT USIC0 BCCU0 8k ROM SCU VADC LEDTS0 RTC Memories ERU0 LEDTS1 1) 0.5kbytes of sector 0 (readable only). Figure 1 System Block Diagram CPU Subsystem • CPU Core – High-performance 32-bit ARM Cortex-M0 CPU – Most 16-bit Thumb and subset of 32-bit Thumb2 instruction set – Single cycle 32-bit hardware multiplier Data Sheet 8 V1.8, 2016-09 Subject to Agreement on the Use of Product Information 16-bit APB Bus

XMC1200 AB-Step XMC1000 Family Summary of Features – System timer (SysTick) for Operating System support – Ultra low power consumption • Nested Vectored Interrupt Controller (NVIC) • Event Request Unit (ERU) for processing of external and internal service requests On-Chip Memories • 8 kbytes on-chip ROM • 16 kbytes on-chip high-speed SRAM • up to 200 kbytes on-chip Flash program and data memory Communication Peripherals • Two Universal Serial Interface Channels (USIC), usable as UART, double-SPI, quad-SPI, IIC, IIS and LIN interfaces • LED and Touch-Sense Controller (LEDTS) for Human-Machine interface Analog Frontend Peripherals • A/D Converters – up to 12 analog input pins – 2 sample and hold stages with 8 analog input channels each – fast 12-bit analog to digital converter with adjustable gain • Up to 8 channels of out of range comparators (ORC) • Up to 3 fast analog comparators (ACMP) • Temperature Sensor (TSE) Industrial Control Peripherals • Capture/Compare Units 4 (CCU4) as general purpose timers • Brightness and Colour Control Unit (BCCU), for LED color and dimming application System Control • Window Watchdog Timer (WDT) for safety sensitive applications • Real Time Clock module with alarm support (RTC) • System Control Unit (SCU) for system configuration and control • Pseudo random number generator (PRNG) for fast random data generation Input/Output Lines • Programmable port driver control module (PORTS) • Individual bit addressability • Tri-stated in input mode • Push/pull or open drain output mode • Configurable pad hysteresis Data Sheet 9 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family Summary of Features On-Chip Debug Support • Support for debug features: 4 breakpoints, 2 watchpoints • Various interfaces: ARM serial wire debug (SWD), single pin debug (SPD) 1.1 Ordering Information The ordering code for an Infineon microcontroller provides an exact reference to a specific product. The code “XMC1<DDD>-<Z><PPP><T><FFFF>” identifies: • <DDD> the derivatives function set • <Z> the package variant – T: TSSOP – Q: VQFN • <PPP> package pin count • <T> the temperature range: – F: -40°C to 85°C – X: -40°C to 105°C • <FFFF> the Flash memory size. For ordering codes for the XMC1200 please contact your sales representative or local distributor. This document describes several derivatives of the XMC1200 series, some descriptions may not apply to a specific product. Please see Table 1. For simplicity the term XMC1200 is used for all derivatives throughout this document. 1.2 Device Types These device types are available and can be ordered through Infineon’s direct and/or distribution channels. Table 1 Synopsis of XMC1200 Device Types Derivative Package Flash SRAM Kbytes Kbytes XMC1201-T028F0016 PG-TSSOP-28-16 16 16 XMC1201-T028F0032 PG-TSSOP-28-16 32 16 XMC1201-T038F0016 PG-TSSOP-38-9 16 16 XMC1201-T038F0032 PG-TSSOP-38-9 32 16 XMC1201-T038F0064 PG-TSSOP-38-9 64 16 XMC1201-T038F0128 PG-TSSOP-38-9 128 16 XMC1201-T038F0200 PG-TSSOP-38-9 200 16 XMC1200-T038F0200 PG-TSSOP-38-9 200 16 Data Sheet 10 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family Summary of Features Table 1 Synopsis of XMC1200 Device Types (cont’d) Derivative Package Flash SRAM Kbytes Kbytes XMC1202-T028X0016 PG-TSSOP-28-16 16 16 XMC1202-T028X0032 PG-TSSOP-28-16 32 16 XMC1202-T028X0064 PG-TSSOP-28-16 64 16 XMC1202-T016X0016 PG-TSSOP-16-8 16 16 XMC1202-T016X0032 PG-TSSOP-16-8 32 16 XMC1202-T016X0064 PG-TSSOP-16-8 64 16 XMC1202-Q024X0016 PG-VQFN-24-19 16 16 XMC1202-Q024X0032 PG-VQFN-24-19 32 16 XMC1201-Q040F0016 PG-VQFN-40-13 16 16 XMC1201-Q040F0032 PG-VQFN-40-13 32 16 XMC1201-Q040F0064 PG-VQFN-40-13 64 16 XMC1201-Q040F0128 PG-VQFN-40-13 128 16 XMC1201-Q040F0200 PG-VQFN-40-13 200 16 XMC1202-Q040X0016 PG-VQFN-40-13 16 16 XMC1202-Q040X0032 PG-VQFN-40-13 32 16 1.3 Device Type Features The following table lists the available features per device type. Table 2 Features of XMC1200 Device Types1) Derivative ADC channel ACMP BCCU LEDTS XMC1200-T038 16 3 1 2 XMC1201-T028 14 - - 2 XMC1201-T038 16 - - 2 XMC1202-T028 14 3 1 - XMC1202-T016 11 2 1 - XMC1202-Q024 13 3 1 - XMC1201-Q040 16 - - 2 XMC1202-Q040 16 3 1 - 1) Features that are not included in this table are available in all the derivatives Data Sheet 11 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family Summary of Features Table 3 ADC Channels 1) Package VADC0 G0 VADC0 G1 PG-TSSOP-16 CH0..CH5 CH0..CH4 PG-TSSOP-28 CH0..CH7 CH0 .. CH4, CH7 PG-TSSOP-38 CH0..CH7 CH0..CH7 PG-VQFN-24 CH0..CH7 CH0..CH4 PG-VQFN-40 CH0..CH7 CH1, CH5 .. CH7 1) Some pins in a package may be connected to more than one channel. For the detailed mapping see the Port I/O Function table. 1.4 Chip Identification Number The Chip Identification Number allows software to identify the marking. It is a 8 words value with the most significant 7 words stored in Flash configuration sector 0 (CS0) at address location : 1000 0F00H (MSB) - 1000 0F1BH (LSB). The least significant word and most significant word of the Chip Identification Number are the value of registers DBGROMID and IDCHIP, respectively. Table 4 XMC1200 Chip Identification Number Derivative Value Marking XMC1201-T028F0016 00012022 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00005000 201ED083H XMC1201-T028F0032 00012022 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00009000 201ED083H XMC1201-T038F0016 00012012 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00005000 201ED083H XMC1201-T038F0032 00012012 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00009000 201ED083H XMC1201-T038F0064 00012012 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00011000 201ED083H XMC1201-T038F0128 00012012 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00021000 201ED083H XMC1201-T038F0200 00012012 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00033000 201ED083H XMC1200-T038F0200 00012012 01CF00FF 00001FF7 0000E000 AB 00000C00 00001000 00033000 201ED083H Data Sheet 12 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family Summary of Features Table 4 XMC1200 Chip Identification Number (cont’d) Derivative Value Marking XMC1202-T028X0016 00012023 01CF00FF 00001FF7 00008000 AB 00000C00 00001000 00005000 201ED083H XMC1202-T028X0032 00012023 01CF00FF 00001FF7 00008000 AB 00000C00 00001000 00009000 201ED083H XMC1202-T028X0064 00012023 01CF00FF 00001FF7 00008000 AB 00000C00 00001000 00011000 201ED083H XMC1202-T016X0016 00012033 01CF00FF 00001FF7 00008000 AB 00000C00 00001000 00005000 201ED083H XMC1202-T016X0032 00012033 01CF00FF 00001FF7 00008000 AB 00000C00 00001000 00009000 201ED083H XMC1202-T016X0064 00012033 01CF00FF 00001FF7 00008000 AB 00000C00 00001000 00011000 201ED083H XMC1202-Q024X0016 00012063 01CF00FF 00001FF7 00008000 AB 00000C00 00001000 00005000 201ED083H XMC1202-Q024X0032 00012063 01CF00FF 00001FF7 00008000 AB 00000C00 00001000 00009000 201ED083H XMC1201-Q040F0016 00012042 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00005000 201ED083H XMC1201-Q040F0032 00012042 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00009000 201ED083H XMC1201-Q040F0064 00012042 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00011000 201ED083H XMC1201-Q040F0128 00012042 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00021000 201ED083H XMC1201-Q040F0200 00012042 01CF00FF 00001FF7 00006000 AB 00000C00 00001000 00033000 201ED083H XMC1202-Q040X0016 00012043 01CF00FF 00001FF7 00008000 AB 00000C00 00001000 00005000 201ED083H XMC1202-Q040X0032 00012043 01CF00FF 00001FF7 00008000 AB 00000C00 00001000 00009000 201ED083H Data Sheet 13 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family General Device Information 2 General Device Information This section summarizes the logic symbols and package pin configurations with a detailed list of the functional I/O mapping. 2.1 Logic Symbols VDDP VSSP VDDP VSSP (2) (2) (1) (1) Port 0 Port 0 16 bit 12 bit Port 1 Port 1 XMC1200 6 bit XMC1200 4 bit TSSOP-38 Port 2 TSSOP-28 Port 2 4 bit 4 bit Port 2 Port 2 8 bit 6 bit VDDP VSSP (1) (1) Port 0 8 bit XMC1200 Port 2 TSSOP-16 3 bit Port 2 3 bit Figure 2 XMC1200 Logic Symbol for TSSOP-38, TSSOP-28 and TSSOP-16 Data Sheet 14 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family General Device Information V V DDP VSSP DD VSS VDDP VSSP (1) (1) (1) (1) (2) (1) Port 0 Port 0 16 bit 10 bit Port 1 Port 1 XMC1200 7 bit XMC1200 4 bit VQFN-40 Port 2 VQFN-24 Port 2 4 bit 4 bit Port 2 Port 2 8 bit 4 bit Figure 3 XMC1200 Logic Symbol for VQFN-24 and VQFN-40 Data Sheet 15 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family General Device Information 2.2 Pin Configuration and Definition The following figures summarize all pins, showing their locations on the different packages. P2.4 1 38 P2.3 Top View P2.5 2 37 P2.2 P2.6 3 36 P2.1 P2.7 4 35 P2.0 P2.8 5 34 P0.15 P2.9 6 33 P0.14 P2.10 7 32 P0.13 P2.11 8 31 P0.12 VSSP/VSS 9 30 P0.11 VDDP/VDD 10 29 P0.10 P1.5 11 28 P0.9 P1.4 12 27 P0.8 P1.3 13 26 VDDP P1.2 14 25 VSSP P1.1 15 24 P0.7 P1.0 16 23 P0.6 P0.0 17 22 P0.5 P0.1 18 21 P0.4 P0.2 19 20 P0.3 Figure 4 XMC1200 PG-TSSOP-38 Pin Configuration (top view) Data Sheet 16 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family General Device Information P2.6 1 28 P2.5 Top View P2.7 2 27 P2.2 P2.8 3 26 P2.1 P2.9 4 25 P2.0 P2.10 5 24 P0.15 P2.11 6 23 P0.14 VSSP/VSS 7 22 P0.13 VDDP/VDD 8 21 P0.12 P1.3 9 20 P0.10 P1.2 10 19 P0.9 P1.1 11 18 P0.8 P1.0 12 17 P0.7 P0.0 13 16 P0.6 P0.4 14 15 P0.5 Figure 5 XMC1200 PG-TSSOP-28 Pin Configuration (top view) P2.7/P2.8 1 16 P2.6 Top View P2.9 2 15 P2.0 P2.10 3 14 P0.15 P2.11 4 13 P0.14 VSSP/VSS 5 12 P0.9 VDDP/VDD 6 11 P0.8 P0.0 7 10 P0.7 P0.5 8 9 P0.6 Figure 6 XMC1200 PG-TSSOP-16 Pin Configuration (top view) Data Sheet 17 V1.8, 2016-09 Subject to Agreement on the Use of Product Information

XMC1200 AB-Step XMC1000 Family General Device Information 18 17 16 15 14 13 P0.8 19 12 P1.2 P0.9 20 11 P1.3 P0.12 21 10 VDDP/V DD P0.13 22 9 VSSP /V SS P0.14 23 8 P2.11 P0.15 24 7 P2.10 1 2 3 4 5 6 Figure 7 XMC1200 PG-VQFN-24 Pin Configuration (top view) Data Sheet 18 V1.8, 2016-09 Subject to Agreement on the Use of Product Information P0.7 P0.6 P0.5 P0.0 P1.0 P1.1 P2.9 P2.7/P2.8 P2.6 P2.2 P2.1 P2.0

XMC1200 AB-Step XMC1000 Family General Device Information 30 29 28 27 26 25 24 23 22 21 VSSP 31 20 P1.2 VDDP 32 19 P1.3 P0.8 33 18 P1.4 P0.9 34 17 P1.5 P0.10 35 16 P1.6 P0.11 36 15 VDDP P0.12 37 14 VDD P0.13 38 13 VSS P0.14 39 12 P2.11 P0.15 40 11 P2.10 1 2 3 4 5 6 7 8 9 10 Figure 8 XMC1200 PG-VQFN-40 Pin Configuration (top view) Data Sheet 19 V1.8, 2016-09 Subject to Agreement on the Use of Product Information P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 P1.0 P1.1 P2.9 P2.8 P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0

XMC1200 AB-Step XMC1000 Family General Device Information 2.2.1 Package Pin Summary The following general building block is used to describe each pin: Table 5 Package Pin Mapping Description Function Package A Package B ... Pad Type Px.y N N Pad Class The table is sorted by the “Function” column, starting with the regular Port pins (Px.y), followed by the supply pins. The following columns, titled with the supported package variants, lists the package pin number to which the respective function is mapped in that package. The “Pad Type” indicates the employed pad type: • STD_INOUT (standard bi-directional pads) • STD_INOUT/AN (standard bi-directional pads with analog input) • High Current (high current bi-directional pads) • STD_IN/AN (standard input pads with analog input) • Power (power supply) Details about the pad properties are defined in the Electrical Parameters. Table 6 Package Pin Mapping Function VQFN TSSOP TSSOP VQFN TSSOP Pad Type Notes 40 38 28 24 16 P0.0 23 17 13 15 7 STD_INO UT P0.1 24 18 - - - STD_INO UT P0.2 25 19 - - - STD_INO UT P0.3 26 20 - - - STD_INO UT P0.4 27 21 14 - - STD_INO UT P0.5 28 22 15 16 8 STD_INO UT P0.6 29 23 16 17 9 STD_INO UT Data Sheet 20 V1.8, 2016-09 Subject to Agreement on the Use of Product Information