LT6015/LT6016/LT6017 3.2MHz, 0.8V/µs Low Power, Over-The-Top Precision Op Amps

LT6015/LT6016/LT6017 3.2MHz, 0.8V/µs Low Power, Over-The-Top Precision Op Amps FeaTures DescripTion n Input Common Mode Range: V– to V– + 76V The LT®6015/LT6016/LT6017 are single/dual/quad rail-to- n Rail-to-Rail Input and Output rail input operational amplifiers with input offset voltage n Low Power: 315μA/Amplifier trimmed to less than 50µV. These amplifiers operate on n Operating Temperature Range: –55°C to 150°C single and split supplies with a total voltage of 3V to 50V n VOS: ±50μV (Maximum) and draw only 315µA per amplifier. They are reverse n CMRR, PSRR: 126dB battery protected, drawing very little current for reverse n Reverse Battery Protection to 50V supplies up to 50V. n Gain Bandwidth Product: 3.2MHz The Over-The-Top® input stage of the LT6015/LT6016/ n Specified on 5V and ±15V Supplies LT6017 is designed to provide added protection in tough n High Voltage Gain: 1000V/mV environments. The input common mode range extends n No Phase Reversal from V– to V+ and beyond: these amplifiers operate with n No Supply Sequencing Problems inputs up to 76V above V– independent of V+. Internal n Single 5-Lead SOT-23 (ThinSOT™) Package resistors protect the inputs against transient faults up n Dual 8-Lead MSOP to 25V below the negative supply. The LT6015/LT6016/ n Quad 22-Lead DFN (6mm × 3mm) LT6017 can drive loads up to 25mA and are unity-gain applicaTions stable with capacitive loads as large as 200pF. Optional external compensation can be added to extend the capaci- n High Side or Low Side Current Sensing tive drive capability beyond 200pF. n Battery/Power Supply Monitoring 4mA to 20mA Transmitters The LT6015 is offered in a 5-lead SOT package. The LT6016 n High Voltage Data Acquisition dual op amp is available in an 8-lead MSOP package. The n Battery/Portable Instrumentation LT6017 is offered in a 22-pin leadless DFN package. n L, LT, LTC, LTM, Linear Technology, Over-The-Top and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical applicaTion Precision High Voltage High Side Load Current Monitor Output Error vs Load Current 0.2 0 VBAT = 1.5V TO 76V 5V 0.1µF –0.2 200Ω + 100Ω 0.1Ω 1% –0.4 10W LT6015 BSP89 200Ω – 1V/A –0.6 0V TO 1V OUT VBAT = 1.5V LOAD 2k –0.8 VBAT = 5V VBAT = 20V VBAT = 75V 601567 TA01a –1.0 0.01 0.1 1 LOAD CURRENT (A) 601567 TA01b 601567ff For more information www.linear.com/LT6015 1 OUTPUT ERROR (%)

LT6015/LT6016/LT6017 absoluTe MaxiMuM raTings (Note 1) Supply Voltage (V+ to V–) ................................60V, –50V Temperature Range (Notes 4, 5) Input Differential Voltage ........................................±80V LT6015I/LT6016I/LT6017I ....................–40°C to 85°C Input Voltage (Note 2) .....................................80V, –25V LT6015H/LT6016H/LT6017H .............. –40°C to 125°C Input Current (Note 2) .......................................... ±10mA LT6015MP/LT6016MP/LT6017MP Output Short-Circuit Duration (TJUNCTION) ........................................ –55°C to 150°C (Note 3) ......................................................... Continuous Storage Temperature Range .................. –65°C to 150°C Maximum Junction Temperature .......................... 150°C Lead Temperature (Soldering, 10sec).................... 300°C pin conFiguraTion TOP VIEW OUTA 1 22 OUTD –INA 2 21 –IND A D +INA 3 20 +IND TOP VIEW N/C 4 19 N/C TOP VIEW + – + V 5 18 V OUTA 1 8 V+ OUT 1 5 V 23 –INA 2 7 OUTB V– N/C 6 17 N/C 2 +INA A 6 –INB V+ 3 7 16 V– V– 4 B 5 +INB +IN 3 4 –IN N/C 8 15 N/C MS8 PACKAGE S5 PACKAGE +INB 9 14 +INC 8-LEAD PLASTIC MSOP 5-LEAD PLASTIC TSOT-23 B C –INB 10 13 –INC T = 150°C,  = 273°C/W,  = 45°C/W OUTB 11 12 OUTC JMAX JA JC TJMAX = 150°C, JA = 250°C/W DJC PACKAGE 22-LEAD (6mm × 3mm) PLASTIC DFN TJMAX = 150°C, JA = 31.8°C/W, JC = 4.3°C/W CONNECT UNDERSIDE METAL TO V– orDer inForMaTion Lead Free Finish TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT6015IS5#TRMPBF LT6015IS5#TRPBF LTGJD 5-Lead Plastic TSOT-23 –40°C to 85°C LT6015HS5#TRMPBF LT6015HS5#TRPBF LTGJD 5-Lead Plastic TSOT-23 –40°C to 125°C LT6015MPS5#TRMPBF LT6015MPS5#TRPBF LTGJD 5-Lead Plastic TSOT-23 –55°C to 150°C TRM = 500 pieces. Consult LTC Marketing for information on lead based finish parts. LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT6016IMS8#PBF LT6016IMS8#TRPBF LTGFK 8-Lead Plastic MSOP –40°C to 85°C LT6016HMS8#PBF LT6016HMS8#TRPBF LTGFK 8-Lead Plastic MSOP –40°C to 125°C LT6016MPMS8#PBF LT6016MPMS8#TRPBF LTGFK 8-Lead Plastic MSOP –55°C to 150°C LT6017IDJC#PBF LT6017IDJC#TRPBF 6017 22-Lead Plastic DFN –40°C to 85°C LT6017HDJC#PBF LT6017HDJC#TRPBF 6017 22-Lead Plastic DFN –40°C to 125°C LT6017MPDJC#PBF LT6017MPDJC#TRPBF 6017 22-Lead Plastic DFN –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 601567ff 2 For more information www.linear.com/LT6015

LT6015/LT6016/LT6017 e lecTrical characTerisTics The l denotes the specifications which apply over the specified temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H–grade parts, otherwise specifications are at TA = 25°C, VS = 5V, VCM = VOUT = mid-supply. I-, H-GRADE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V + OS Input Offset Voltage 0 < VCM < V – 1.75V MS8 Package –50 ±25 50 µV 0 < V + CM < V – 1.75V SOT-23, DJC22 Packages –80 ±45 80 µV VCM = 5V –125 ±50 125 µV VCM =76V –135 ±50 135 µV 0 < V + CM < V – 1.75V l –250 ±45 250 µV VCM = 5V to VCM = 76V l –350 ±50 350 µV ∆VOS Input Offset Voltage Drift 0.75 µV/°C ∆TEMP ∆VOS Long Term Voltage Offset Stability 0.75 µV/Mo ∆TIME IB Input Bias Current 0.25V < VCM < V+ – 1.75V –5 ±2 5 nA VCM = 0V –60 –16.5 0 nA VCM = 5V to 76V 11 14 17.5 µA 0.25V < VCM < V+ – 1.75V l –15 ±2 15 nA VCM = 0V l –150 –16.5 0 nA VCM = 5V to 76V l 7 14 23 µA VS = 0V, VCM = 0V to 76V l 0.001 1 µA IOS Input Offset Current 0.25V < V < V+ CM – 1.75V –5 ±2 5 nA VCM = 0V –5 ±2 5 nA VCM = 5V to 76V (Note 6) –500 ±50 500 nA 0.25V < VCM < V+ – 1.75V l –15 ±2 15 nA VCM = 0V l –15 ±2 15 nA VCM = 5V to 76V (Note 6) l –500 ±50 500 nA VCMR Common Mode Input Range l 0 76 V CIN Differential Input Capacitance 5 pF RIN Differential Input Resistance 0 < VCM < V+ – 1.75V 1 MΩ VCM > V+ 3.7 kΩ RINCM Common Mode Input Resistance 0 < VCM < V+ – 1.75V >1 GΩ VCM > V+ >100 MΩ en Input Referred Noise Voltage Density f = 1kHz V + CM < V – 1.75V 18 nV/√Hz V > V+ CM 25 nV/√Hz Input Referred Noise Voltage f = 0.1Hz to 10Hz 0.5 µVP-P V < V+ CM – 1.75V in Input Referred Noise Current Density f = 1kHz VCM < V+ – 1.75V 0.1 pA/√Hz V > V+ CM 11.5 pA/√Hz AVOL Open Loop Gain RL = 10kΩ l 300 3000 V/mV ∆VOUT = 3V PSRR Supply Rejection Ratio VS = ±1.65V to ±15V l 110 126 dB VCM = VOUT = Mid-Supply CMRR Input Common Mode Rejection Ratio VCM = 0V to 3.25V l 100 126 dB VCM = 5V to 76V l 126 140 dB VOL Output Voltage Swing Low VS = 5V, No Load l 3 55 mV VS = 5V, ISINK = 5mA l 280 500 mV VOH Output Voltage Swing High VS = 5V, No Load l 450 700 mV VS = 5V, ISOURCE = 5mA l 1000 1250 mV ISC Short-Circuit Current VS = 5V, 50Ω to V+ l 10 25 mA VS = 5V, 50Ω to V– l 10 25 mA 601567ff For more information www.linear.com/LT6015 3

LT6015/LT6016/LT6017 e lecTrical characTerisTics The l denotes the specifications which apply over the specified temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H–grade parts, otherwise specifications are at TA = 25°C, VS = 5V, VCM = VOUT = mid-supply. I-, H-GRADE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS GBW Gain Bandwidth Product fTEST = 100kHz 2.85 3.2 MHz l 2.5 3.2 MHz SR Slew Rate ∆VOUT = 3V 0.55 0.75 V/µs l 0.45 0.75 V/µs tS Settling Time Due to Input Step 0.1% Settling 3.5 µs ∆VOUT = ±2V VS Supply Voltage 3 50 V l 3.3 50 V Reverse Supply (Note 7) IS < –25µA/Amplifier l –65 –50 V IS Supply Current Per Amplifier SOT-23 Package 315 345 µA MS8, DJC22 Packages 315 335 µA l 315 500 µA RO Output Impedance ∆IO = ±5mA 0.15 Ω The l denotes the specifications which apply over the specified temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H–grade parts, otherwise specifications are at TA = 25°C, VS = ±15V, VCM = VOUT = mid-supply. I-, H-GRADE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOSI Input Offset Voltage –80 ±55 80 µV l –250 ±55 250 µV VS = ±25V –110 ±75 110 µV VS = ±25V l –250 ±75 250 µV ∆VOSI Input Offset Voltage Drift 0.75 µV/°C ∆TEMP IB Input Bias Current –5 ±2 5 nA l –15 ±2 15 nA IOS Input Offset Current –5 ±2 5 nA l –15 ±2 15 nA VCMR Common Mode Input Range l –15 61 V CIN Differential Input Capacitance 5 pF RIN Differential Input Resistance 0 < VCM < V+ – 1.75V 1 MΩ V + CM > V 3.7 kΩ RINCM Common Mode Input Resistance 0 < VCM < V+ – 1.75V >1 GΩ VCM > V+ >100 MΩ en Input Referred Noise Voltage Density f = 1kHz VCM < V+ – 1.75V 18 nV/√Hz V + CM > V 25 nV/√Hz Input Referred Noise Voltage f = 0.1Hz to 10Hz 0.5 µVP-P VCM < V+ – 1.25V in Input Referred Noise Current Density f = 1kHz V < V+ CM – 1.75V 0.1 pA/√Hz VCM > V+ 11.5 pA/√Hz AVOL Open Loop Gain RL = 10kΩ l 200 1000 V/mV ∆VOUT = 27V PSRR Supply Rejection Ratio VS = ±2.5V to ±25V l 114 126 dB VCM = VOUT = 0V CMRR Input Common Mode Rejection Ratio VCM = –15V to 13.25V l 110 126 dB VOL Output Voltage Swing Low VS = ±15V, No Load l 3 55 mV VS = ±15V, ISINK = 5mA l 280 500 mV VOH Output Voltage Swing High VS = ±15V, No Load l 450 700 mV VS = ±15V, ISOURCE = 5mA l 1000 1250 mV 601567ff 4 For more information www.linear.com/LT6015

LT6015/LT6016/LT6017 e lecTrical characTerisTics The l denotes the specifications which apply over the specified temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H–grade parts, otherwise specifications are at TA = 25°C, VS = ±15V, VCM = VOUT = mid-supply. I-, H-GRADE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ISC Short-Circuit Current VS = ±15V, 50Ω to GND l 10 30 mA VS = ±15V, 50Ω to GND l 10 32 mA GBW Gain Bandwidth Product fTEST = 100kHz 2.9 3.3 MHz l 2.55 3.3 MHz SR Slew Rate ∆VOUT = 3V 0.6 0.8 V/µs l 0.5 0.8 V/µs tS Settling Time Due to Input Step 0.1% Settling 3.5 µs ∆VOUT = ±2V VS Supply Voltage 3 50 V l 3.3 50 V Reverse Supply IS = –25µA/Amplifier l –65 –30 V IS Supply Current Per Amplifier SOT-23 Package 325 360 µA MS8, DJC22 Packages 325 350 µA l 325 525 µA VS = ±25V, SOT-23 Package 340 370 µA VS = ±25V, MS8, DJC22 Package 340 360 µA VS = ±25V l 340 550 µA RO Output Impedance ∆IO = ±5mA 0.15 Ω The l denotes the specifications which apply over the specified temperature range, –55°C < TJUNCTION < 150°C for MP-grade parts, otherwise specifications are at TA = 25°C, VS = 5V, VCM = VOUT = mid-supply. MP-GRADE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage 0 < V + CM < V – 1.75V µV MS8 Package –50 ±25 50 µV 0 < VCM < V+ – 1.75V DJC22 Package –80 ±45 80 µV VCM = 5V –125 ±50 125 µV VCM = 76V –135 ±50 135 µV 0 < V + CM < V –1.75V l –500 ±45 500 µV VCM = 5V to VCM = 76V l –600 ±50 600 µV ∆VOS Input Offset Voltage Drift 0.75 µV/°C ∆TEMP ∆VOS Long Term Voltage Offset Stability 0.75 µV/Mo ∆TIME IB Input Bias Current 0.25V < V < V+ CM – 1.75V –5 ±2 5 nA VCM = 0V –60 –16.5 0 nA VCM = 5V to 76V 11 14 17.5 µA 0.25V < V + CM < V – 1.75V l –100 ±2 100 nA VCM = 0V l –500 –16.5 0 nA VCM = 5V to 76V l 6.5 14 24 µA VS = 0V, VCM = 0V to 76V l 0.001 4 µA IOS Input Offset Current 0.25V < VCM < V+ – 1.75V –5 ±2 5 nA VCM = 0V –5 ±2 5 nA VCM = 5V to 76V (Note 6) –500 ±50 500 nA 0.25V < VCM < V+ – 1.75V l –50 ±2 50 nA VCM = 0V l –200 ±2 200 nA VCM = 5V to 76V (Note 6) l –500 ±150 500 nA VCMR Common Mode Input Range l 0 76 V CIN Differential Input Capacitance 5 pF RIN Differential Input Resistance 0 < V < V+ CM – 1.75V 1 MΩ V + CM > V 3.7 kΩ RINCM Common Mode Input Resistance 0 < VCM < V+ – 1.75V >1 GΩ VCM > V+ >100 MΩ 601567ff For more information www.linear.com/LT6015 5

LT6015/LT6016/LT6017 elecTrical characTerisTics The l denotes the specifications which apply over the specified temperature range, –55°C < TJUNCTION < 150°C for MP-grade parts, otherwise specifications are at TA = 25°C, VS = 5V, VCM = VOUT = mid-supply. MP-GRADE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS en Input Referred Noise Voltage Density f = 1kHz VCM < V+ – 1.75V 18 nV/√Hz VCM > V+ 25 nV/√Hz Input Referred Noise Voltage f = 0.1Hz to 10Hz 0.5 µVP-P VCM < V+ – 1.75V in Input Referred Noise Current Density f = 1kHz VCM < V+ – 1.75V 0.1 pA/√Hz VCM > V+ 11.5 pA/√Hz AVOL Open Loop Gain RL = 10kΩ l 200 3000 V/mV ∆VOUT = 3V PSRR Supply Rejection Ratio VS = ±1.65V to ±15V l 106 126 dB VCM = VOUT = Mid-Supply CMRR Input Common Mode Rejection Ratio VCM = 0V to 3.25V l 90 126 dB VCM = 5V to 76V l 120 140 dB VOL Output Voltage Swing Low VS = 5V, No Load l 3 75 mV VS = 5V, ISINK = 5mA l 280 550 mV VOH Output Voltage Swing High VS = 5V, No Load l 450 750 mV VS = 5V, ISOURCE = 5mA l 1000 1300 mV ISC Short-Circuit Current VS = 5V, 50Ω to V+ l 8 25 mA VS = 5V, 50Ω to V– l 8 25 mA GBW Gain Bandwidth Product fTEST = 100kHz 2.85 3.2 MHz l 2.4 3.2 MHz SR Slew Rate ∆VOUT = 3V 0.55 0.75 V/µs l 0.4 0.75 V/µs tS Settling Time Due to Input Step 0.1% Settling 3.5 µs ∆VOUT = ±2V VS Supply Voltage 3 50 V l 3.3 50 V Reverse Supply (Note 7) IS < –25VµA/Amplifier l –63 –50 V IS Supply Current Per Amplifier SOT-23 Package 315 345 µA MS8, DJC22 Packages 315 335 µA l 315 540 µA RO Output Impedance ∆IO = ±5mA 0.15 Ω The l denotes the specifications which apply over the specified temperature range, –55°C < TJUNCTION < 150°C for MP-grade parts, otherwise specifications are at TA = 25°C, VS = ±15V, VCM = VOUT = mid-supply. MP-GRADE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOSI Input Offset Voltage –80 ±55 80 µV l –500 ±55 500 µV VS = ±25V –110 ±75 110 µV VS = ±25V l –500 ±75 500 µV ∆VOSI Input Offset Voltage Drift 0.75 µV/°C ∆TEMP IB Input Bias Current –5 ±2 5 nA l –300 ±2 300 nA IOS Input Offset Current –5 ±2 5 nA l –50 ±2 50 nA VCMR Common Mode Input Range l –15 61 V CIN Differential Input Capacitance 5 pF RIN Differential Input Resistance 0 < VCM < V+ – 1.75V 1 MΩ VCM > V+ 3.7 kΩ 601567ff 6 For more information www.linear.com/LT6015

LT6015/LT6016/LT6017 elecTrical characTerisTics The l denotes the specifications which apply over the specified temperature range, –55°C < TJUNCTION < 150°C for MP-grade parts, otherwise specifications are at TA = 25°C, VS = ±15V, VCM = VOUT = Mid-Supply. MP-GRADE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS RINCM Common Mode Input Resistance 0 < V + CM < V – 1.75V >1 GΩ V > V+ CM >100 MΩ en Input Referred Noise Voltage Density f = 1kHz VCM < V+ – 1.75V 18 nV/√Hz V + CM > V 25 nV/√Hz Input Referred Noise Voltage f = 0.1Hz to 10Hz 0.5 µVP-P V < V+ CM – 1.75V in Input Referred Noise Current Density f = 1kHz V + CM < V – 1.75V 0.1 pA/√Hz VCM > V+ 11.5 pA/√Hz AVOL Open Loop Gain RL = 10kΩ l 100 1000 V/mV ∆VOUT = 27V PSRR Supply Rejection Ratio VS = ±2.5V to ±25V l 106 126 dB VCM = VOUT = 0V CMRR Input Common Mode Rejection Ratio VCM = –15V to 13.25V l 100 126 dB VOL Output Voltage Swing Low VS = ±15V, No Load l 3 75 mV VS = ±15V, ISINK = 5mA l 280 550 mV VOH Output Voltage Swing High VS = ±15V, No Load l 450 750 mV VS = ±15V, ISOURCE = 5mA l 1000 1300 mV ISC Short-Circuit Current VS = ±15V, 50Ω to GND l 8 30 mA VS = ±15V, 50Ω to GND l 8 32 mA GBW Gain Bandwidth Product fTEST = 100kHz 2.9 3.3 MHz l 2.45 3.3 MHz SR Slew Rate ∆VOUT = 3V 0.6 0.8 V/µs l 0.45 0.8 V/µs tS Settling Time Due to Input Step 0.1% Settling 3.5 µs ∆VOUT = ±2V VS Supply Voltage 3 50 V l 3.3 50 V Reverse Supply IS = –25µA/Amplifier l –65 –30 V IS Supply Current Per Amplifier SOT-23 Package 325 360 µA MS8, DJC22 Packages 325 350 µA l 325 575 µA VS = ±25V, SOT-23 Package 340 370 µA VS = ±25V, MS8, DJC22 Package 340 360 µA VS = ±25V l 340 600 µA RO Output Impedance ∆IO = ±5mA 0.15 Ω Note 1: Stresses beyond those listed under Absolute Maximum Ratings The LT6015MP/LT6016MP/LT6017MP are guaranteed functional over the may cause permanent damage to the device. Exposure to any Absolute junction temperature range of –55°C to 150°C. Junction temperatures greater Maximum Rating condition for extended periods may affect device than 125°C will promote accelerated aging. The LT6015/LT6016/LT6017 has a reliability and lifetime. demonstrated typical performance beyond 1000 hours at TJ = 150°C. Note 2: Voltages applied are with respect to V–. The inputs are tested to Note 5: The LT6015I/LT6016I/LT6017I are guaranteed to meet specified the Absolute Maximum Rating by applying –25V (relative to V–) to each performance from –40°C to 85°C. The LT6015H/LT6016H/LT6017H are input for 10ms. In general, faults capable of sinking current from either guaranteed to meet specified performance from –40°C to 125°C. The input should be current limited to under 10mA. See the Applications LT6015MP/LT6016MP/LT6017MP are guaranteed to meet specified Information section for more details. performance with junction temperature ranging from –55°C to 150°C. Note 3: A heat sink may be required to keep the junction temperature Note 6: Test accuracy is limited by high speed test equipment repeatability. Bench below absolute maximum. This depends on the power supply voltage and measurements indicate the input offset current in the Over-The-Top configuration how many amplifiers are shorted. is typically controlled to under ±50nA at 25°C and ±150nA over temperature. Note 4: The LT6015I/LT6016I/LT6017I are guaranteed functional over the oper- Note 7: The Reverse Supply voltage is tested by pulling 25μA/Amplifier out ating temperature range of –40°C to 85°C. The LT6015H/LT6016H/LT6017H are of the V+ pin while measuring the V+ pin’s voltage with both inputs and V– guaranteed functional over the operating temperature range of –40°C to 125°C. grounded, verifying V+ < –50V. 601567ff For more information www.linear.com/LT6015 7

LT6015/LT6016/LT6017 Typical perForMance characTerisTics Typical Distribution of Input Typical Distribution of Input Typical Distribution of Over-The-Top Offset Voltage Offset Voltage Input Offset Voltage 400 600 350 VS = 5V VS = ±15V 965 UNITS VS = 5V 350 VCM = MID-SUPPLY VCM = 0V 1930 CHANNELS VCM = 5V TA = 25°C 500 TA = 25°C 300 FROM TWO RUNS TA = 25°C 300 MS8 PACKAGE MS8 PACKAGE MS8 PACKAGE 1285 UNITS 400 1285 UNITS 250 250 2570 CHANNELS 2570 CHANNELS FROM TWO RUNS FROM TWO RUNS 200 200 300 150 150 200 100 100 100 50 50 0 0 0 –30–25–20–15–10 –5 0 5 10 15 20 25 30 –50 –40 –30 –20 –10 0 10 20 30 40 50 –50 –40 –30 –20 –10 0 10 20 30 40 50 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) 601567 G01 601567 G02 601567 G03 Typical Distribution of Over-The-Top Typical Distribution of Input Typical Distribution of Over-The-Top Input Offset Voltage Offset Voltage Input Offset Voltage 350 350 500 965 UNITS VS = 5V 510 UNITS VS = 5V 510 UNITS VS = 5V 1930 CHANNELS VCM = 76V 2040 CHANNELS VCM = MID-SUPPLY 450 2040 CHANNELS VCM = 5V 300 FROM TWO RUNS TA = 25°C 300 FROM TWO RUNS TA = 25°C FROM TWO RUNS TA = 25°C MS8 PACKAGE DJC22 PACKAGE 400 DJC22 PACKAGE 250 250 350 200 200 300 250 150 150 200 100 100 150 100 50 50 50 0 0 0 –50 –40 –30 –20 –10 0 10 20 30 40 50 –50 –40 –30 –20 –10 0 10 20 30 40 50 –100 –80 –60 –40 –20 0 20 40 60 80 100 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) 601567 G04 601567 G05 601567 G06 Voltage Offset Shift vs Lead Free Over-The-Top Voltage Offset Shift Voltage Offset Shift vs Lead Free IR Reflow vs Lead Free IR Reflow IR Reflow 18 14 12 24 DEVICES 24 DEVICES 10 DEVICES VS = 5V 16 48 CHANNELS 48 CHANNELS 40 CHANNELS VCM = MID-SUPPLY MS8 PACKAGE 12 MS8 PACKAGE 10 DJC22 PACKAGE 14 VS = 5V VS = 5V VCM = MID-SUPPLY 10 VCM = 5V 12 8 10 8 6 8 6 6 4 4 4 2 2 2 0 0 0 –20 –15 –10 –5 0 5 10 15 20 25 –20 –15 –10 –5 0 5 10 15 20 25 –25 –20 –15 –10 –5 0 5 10 15 20 25 VOLTAGE OFFSET SHIFT (µV) VOLTAGE OFFSET SHIFT (µV) VOLTAGE OFFSET SHIFT (µV) 601567 G07 601567 G08 601567 G09 601567ff 8 For more information www.linear.com/LT6015 NUMBER OF CHANNELS NUMBER OF CHANNELS NUMBER OF CHANNELS NUMBER OF CHANNELS NUMBER OF CHANNELS NUMBER OF CHANNELS NUMBER OF CHANNELS NUMBER OF CHANNELS NUMBER OF CHANNELS

LT6015/LT6016/LT6017 Typical perForMance characTerisTics Voltage Offset Shift vs Thermal Warm-Up Drift Over-The-Top Warm-Up Drift Cycling 2.5 2.5 18 VS = ±15V 5 UNITS, 10 CHANNELS VS = 5V 5 UNITS, 10 CHANNELS FOUR THERMAL CYCLES –55°C TO 130°C 2.0 VCM = 0V MS8 PACKAGE 2.0 VCM = 50V MS8 PACKAGE 16 TA = 25°C 1.5 20 DEVICES 1.5 14 40 CHANNELS 1.0 1.0 MS8 PACKAGE 12 VS = 5V 0.5 0.5 VCM = MID-SUPPLY 10 0.0 0.0 8 –0.5 –0.5 –1.0 6 –1.0 –1.5 –1.5 4 –2.0 CHANNEL A –2.0 CHANNEL A 2 CHANNEL B CHANNEL B –2.5 –2.5 0 0 1 2 3 4 5 0 1 2 3 4 5 –25 –20 –15 –10 –5 0 5 10 15 20 25 TIME AFTER POWER ON (MIN) TIME AFTER POWER ON (MIN) VOLTAGE OFFSET SHIFT (µV) 601567 G10 601567 G11 601567 G12 Voltage Offset Shift Over-The-Top Voltage Offset vs Temperature Cycling Voltage Offset vs Temperature vs Temperature 100 150 150 FOUR CYCLES –55°C TO 130°C VS = 5V 5 UNITS, 10 CHANNELS VS = 5V 5 UNITS, 10 CHANNELS 75 VS = 5V, VCM = MID-SUPPLY VCM = MID-SUPPLY MS8 PACKAGE VCM = 50V MS8 PACKAGE 40 CHANNELS MEASURED 100 100 50 MS8 PACKAGE MAXIMUM SHIFT CHANNEL A CHANNEL A MEASURED CHANNEL B CHANNEL B 50 50 25 TYPICAL 0 CHANNEL 0 0 –25 –50 –50 –50 MINIMUM SHIFT MEASURED –100 –100 –75 WORST-CASE CHANNEL –100 –150 –150 –75 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 601567 G13 601567 G14 601567 G15 Voltage Offset vs Input Common Mode Voltage Voltage Offset vs Supply Voltage Minimum Supply Voltage 50 100 20 VS = 5V 40 75 15 TA = –45°C 30 50 10 20 TA = 125°C 10 T 25 A = 25°C 5 TA = 25°C 0 0 0 T T = –45°C A = 25°C A –10 TA = –45°C –25 –5 –20 T = 125°C –50 TA = 125°C A –10 –30 –40 –75 –15 –50 –100 –20 0.01 0.1 1 10 100 5 10 15 20 25 30 35 40 45 50 0 1 2 3 4 5 VCM (V) TOTAL SUPPLY VOLTAGE (V) TOTAL SUPPLY VOLTAGE (V) 601567 G16 601567 G17 601567 G18 601567ff For more information www.linear.com/LT6015 9 INPUT VOLTAGE OFFSET (µV) VOLTAGE OFFSET SHIFT (µV) CHANGE IN OFFSET VOLTAGE (µV) OFFSET VOLTAGE (µV) VOLTAGE OFFSET (µV) CHANGE IN OFFSET VOLTAGE (µV) CHANGE IN INPUT OFFSET VOLTAGE OFFSET (µV) VOLTAGE OFFSET (µV) NUMBER OF CHANNELS

LT6015/LT6016/LT6017 Typical perForMance characTerisTics Long Term Stability of Five Input Bias Current vs Input Input Bias Current vs Input Representative Units Common Mode Voltage Common Mode Voltage 5 20 25 VS = 5V 5 UNITS, 10 CHANNELS VS = 5V 4 MS8 PACKAGE 3 15 2 0 1 10 0 –1 5 –25 –2 TA = 125°C TA = 125°C 0 TA = 85°C TA = 85°C –3 TA = 25°C TA = 25°C –4 CHANNEL A TA = –45°C TA = –45°C CHANNEL B TA = –55°C TA = –55°C –5 –5 –50 0 1 2 3 4 0.1 1 10 100 0.001 0.01 0.1 1 10 TIME (MONTHS) INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) 601567 G19 601567 G20 601567 G21 Input Bias Current vs Supply Reverse Supply Current Voltage Supply Current vs Supply Voltage vs Reverse Supply Voltage 12.5 600 10 TA = 125°C NON-INVERTING OP AMP CONFIGURATION TA = 85°C TA = 150°C +INA, +INB TIED TO V– 10.0 TA = 25°C 500 TA = –45°C 5 T = –55°C TA = –55°C TA = 130°C A 7.5 400 0 5.0 300 –5 TA = 150°C 2.5 200 TA = –55°C 0.0 –10 TA = 25°C 100 PARAMETRIC SWEEP IN ~25°C INCREMENTS –2.5 0 –15 0 10 20 30 40 50 0 10 20 30 40 50 –60 –50 –40 –30 –20 –10 0 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) 601567 G22 601567 G23 601567 G24 Over-The-Top Noise Density Noise Density vs Frequency vs Frequency 0.1Hz to 10Hz Noise 40 2.00 60 60 VS = 5V VS = ±2.5V TO ±25V 35 1.75 VCM = 5V TA = 25°C 50 50 30 1.50 40 40 25 1.25 20 VOLTAGE NOISE 1.00 30 VOLTAGE NOISE 30 15 0.75 20 20 10 0.50 CURRENT NOISE 10 10 5 CURRENT NOISE 0.25 0 0 0 0 1 10 100 1000 10k 100k 1 10 100 1000 0 2 4 6 8 10 FREQUENCY (Hz) FREQUENCY (Hz) TIME (SEC) 601567 G25 601567 G26 601567 G27 601567ff 10 For more information www.linear.com/LT6015 VOLTAGE NOISE DENSITY (nV/√Hz) INPUT BIAS CURRENT (nA) CHANGE IN OFFSET VOLTAGE (µV) SUPPLY CURRENT PER AMPLIFIER (µA) VOLTAGE NOISE DENSITY (nV/√Hz) INPUT BIAS CURRENT (µA) REVERSE SUPPLY CURRENT PER AMPLIFIER (µA) INPUT BIAS CURRENT (nA) NOISE VOLTAGE (100nV/DIV) CURRENT NOISE DENSITY (pA/√Hz) CURRENT NOISE DENSITY (pA/√Hz)

LT6015/LT6016/LT6017 Typical perForMance characTerisTics Output Impedance vs Frequency PSRR vs Frequency CMRR vs Frequency 1000 120 100 VS = ±2.5V VS = ±2.5V 100 100 80 POSITIVE SUPPLY AV = 100 80 10 60 60 AV = +1 1 40 40 NEGATIVE SUPPLY 0.10 AV = 10 20 20 0.01 0 0 0 1 10 100 1000 10k 0.1 1 10 100 1000 0.1 1 10 100 1000 FREQUENCY (kHz) FREQUENCY (kHz) FREQUENCY (kHz) 601567 G28 601567 G29 601567 G30 Closed-Loop Small Signal Gain and Phase Shift Gain Bandwidth Product and Frequency Response vs Frequency Phase Margin vs Supply Voltage 50 60 90.00 3.5 60 100V/V PHASE CLOAD = 30pF 40 3.4 56 40 112.5 30 GBW 10V/V 20 3.3 52 20 135.0 PM 10 GAIN 3.2 48 1V/V 0 0 157.5 3.1 44 –10 VS = ±2.5V CLOAD = 20pF –20 –20 180.0 3.0 40 1 10 100 1000 10k 0.01 0.1 1 10 0 10 20 30 40 50 FREQUENCY (kHz) FREQUENCY (MHz) TOTAL SUPPLY VOLTAGE (V) 601567 G31 601567 G32 601567 G33 Phase Margin vs Capacitive Load Gain-Bandwidth vs Temperature Channel Separation vs Frequency 45.0 4.0 140 VS = ±2.5V 130 42.5 RLOAD = OPEN 3.5 120 RLOAD = 1kΩ 40.0 VS = ±15V ISRC = 150µA 110 37.5 3.0 VS = 5V 100 ISRC = 0 90 35.0 2.5 80 32.5 70 VS = ±15V 30.0 2.0 60 0 50 100 150 200 250 300 –50 –25 0 25 50 75 100 125 150 0.1 1 10 100 1000 CAPACITIVE LOAD (pF) TEMPERATURE (°C) FREQUENCY (kHz) 601567 G34 601567 G35 601567 G36 601567ff For more information www.linear.com/LT6015 11 PHASE MARGIN (DEG) GAIN (dB) OUTPUT IMPEDANCE (Ω) GAIN-BANDWIDTH (MHz) GAIN (dB) PSRR (dB) CHANNEL SEPARATION (dB) GAIN BANDWIDTH PRODUCT (MHz) CMRR (dB) PHASE MARGIN (DEG) PHASE SHIFT (DEG)

LT6015/LT6016/LT6017 Typical perForMance characTerisTics Settling Time to 0.1% vs Output Step Slew Rate vs Temperature Short-Circuit vs Temperature 5 2.0 40 VS = ±2.5V VS = ±15V VS = 5V 4 VCM = 0V RISING EDGE 30 SINKING 3 AV = +1 1.5 20 2 AV = –1 1 10 0 1.0 0 –1 FALLING EDGE AV = –1 –10 –2 0.5 –20 SOURCING –3 AV = +1 –4 –30 –5 0 –40 2 3 4 5 6 7 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 SETTLING TIME (µs) TEMPERATURE (°C) TEMPERATURE (°C) 601567 G37 601567 G38 601567 G39 Output Saturation Voltage Small Signal Transient Response Large Signal Transient Response vs Input Overdrive 1000 AV = 1V/V AV = 1V/V OUTPUT HIGH VS = ±2.5V VS = ±15 CLOAD = 20pF 100 25mV/DIV 5V/DIV OUTPUT LOW 10 VS = ±2.5V TA = 25°C NO LOAD 601567 G41 1 1µs/DIV 601567 G40 10µs/DIV 1 10 100 1000 INPUT OVERDRIVE (mV) 601567 G42 Output Saturation Voltage (VOL) Output Saturation Voltage (VOH) vs Load Current vs Load Current Open-Loop Gain 10k 10k 200 VS = ±15V 150 1000 1000 100 RLOAD = 2kΩ 50 RLOAD = 10kΩ 100 100 0 RLOAD = 1MΩ –50 10 10 –100 TA = 125°C TA = 125°C TA = 25°C T = 25°C –150 A TA = –45°C TA = –45°C 1 1 –200 0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10 –20 –15 –10 –5 0 5 10 15 20 SINKING LOAD CURRENT (mA) SOURCING LOAD CURRENT (mA) OUTPUT VOLTAGE (V) 601567 G43 601567 G44 601567 G45 601567ff 12 For more information www.linear.com/LT6015 VOL (mV) OUTPUT STEP (V) VOH (mV) SLEW RATE (V/µs) OFFSET VOLTAGE (µV) OUTPUT SATURATION VOLTAGE (mV) SHORT-CIRCUIT CURRENT (mA)

LT6015/LT6016/LT6017 applicaTions inForMaTion Supply Voltage Inputs The positive supply pin of the LT6015/LT6016/LT6017 Referring to the Simplified Schematic, the LT6015/LT6016/ should be bypassed with a small capacitor (typically 0.1μF) LT6017 has two input stages: a common emitter differential as close to the supply pins as possible. When driving input stage consisting of PNP transistors Q1 and Q2 which heavy loads an additional 4.7μF electrolytic capacitor operate when the inputs are biased between V– and 1.5V should be added. When using split supplies, the same is below V+, and a common base input stage consisting of true for the V– supply pin. PNP transistors Q3 to Q6 which operate when the common + The LT6017 consists of two dual amplifier dice assembled mode input is biased greater than V –1.5V. This results in a single DFN package which share a common substrate in two distinct operating regions as shown in Figure 2. (V–). While the V– pins of the quad (pins 16 and 18) must For common mode input voltages approximately 1.5V or always be tied together and to the exposed pad underneath, more below the V+ supply (Q1 and Q2 active), the com- the V+ power supply pins (pins 5 and 7) may be supplied mon emitter PNP input stage is active and the input bias independently. The B and C channel amplifiers are supplied current is typically under ±2nA. When the common mode through V+ by pin 7, and the A and D channel amplifiers are input is within approximately 1V of the V+ supply or higher supplied by pin 5. If pin 5 and pin 7 are not tied together and are biased independently, each V+ pin should have –50V 5V their own dedicated supply bypass to ground. OK! OK! + + Shutdown – – While there are no dedicated shutdown pins for the LT6015/ + LT6016/LT6017, the amplifiers can effectively be shut down 80V into a low power state by removing V+. In this condition REVERSE BATTERY TOLERANT INPUTS DRIVEN ABOVE the input bias current is typically less than 1nA with the SUPPLY TOLERANT inputs biased between V– and 76V above V–, and if the inputs are taken below V–, they appear as a diode in series 5V 5V OK! OK! with 1k of resistance. The output may be pulled up to 50V + + + above the V+ power supply in this condition (See Figure 1). 80V Pulling the output pin below V– will produce unlimited – – current and can damage the part. – 25V LARGE DIFFERENTIAL TRANSIENT Reverse Battery INPUT VOLTAGE + TOLERANT The LT6015/LT6016/LT6017 are protected against reverse INPUTS DRIVEN BELOW GROUND TOLERANT battery voltages up to 50V. In the event a reverse battery 0V OK! condition occurs, the supply current is typically less + than 5µA (assuming the inputs are biased within a diode drop from V–). For typical single supply applications with – + 50V ground referred loads and feedback networks, no other 601567 F01 precautions are required. If the reverse battery condition OUTPUT DRIVEN ABOVE THE results in a negative voltage at the input pins, the current V+ SUPPLY (IN SHUTDOWN) TOLERANT into the pin should be limited by an external resistor to less than 10mA. Figure 1. LT6015/LT6016/LT6017 Fault Tolerant Conditions 601567ff For more information www.linear.com/LT6015 13

LT6015/LT6016/LT6017 applicaTions inForMaTion (Over-The-Top operation), Q9 begins to turn on diverting 5.0 VS = 5V bias current away from the common emitter differential 4.5 input pair to the current mirror consisting of Q11 and Q12. 4.0 The current from Q12 will bias the common base differential 3.5 3.0 TYPICAL COMMON MODE VOLTAGE input pair consisting of Q3 to Q6. Because the Over-The-Top FOR ONSET OF OVER-THE-TOP 2.5 OPERATION input pair is operating in a common base configuration, 2.0 TYPICAL COMMON MODE VOLTAGE the input bias current will increase to about 14μA. Both 1.5 WHERE OVER-THE-TOP OPERATION input stages have their voltage offsets trimmed tightly and FULLY ON 1.0 are specified in the Electrical Characteristics table. TRANSISTION REGION 0.5 The inputs are protected against temporary excursions to 0 –50 –25 0 25 50 75 100 125 150 as much as 25V below V– by internal 1k resistor in series TEMPERATURE (°C) 601567 F02 with each input and a diode from the input to the negative supply. Adding additional external series resistance will Figure 2. LT6016/LT6017 Over-The-Top Transition Region vs extend the protection beyond 25V below V–. The input Temperature stage of the LT6015/LT6016/LT6017 incorporates phase reversal protection to prevent the output from phase Some implications should be understood about Over- reversing for inputs below V–. The-Top operation. The first, and most obvious is the input bias currents change from under ±2nA in normal There are no clamping diodes between the inputs. The operation to 14µA in Over-The-Top operation as the input inputs may be over-driven differentially to 80V without stage transitions from common emitter to common base. damage, or without drawing appreciable input current. Even though the Over-The-Top input bias currents run Figure 1 summarizes the kind of faults that may be applied to the LT6015/LT6016/LT6017 without damage. around 14 µA, they are very well matched and their offset is typically under ±100nA. Over-The-Top Operation Considerations The second and more subtle change to amplifier operation When the input common mode of the LT6015/LT6016/ is the differential input impedance which decreases from LT6017 is biased near or above the V+ supply, the amplifier 1MΩ in normal operation, to approximately 3.7kΩ in is said to be operating in the Over-The-Top configuration. Over-The-Top operation (specified as RIN in the Electrical The differential input pair which control amplifier operation Characteristics table). This resistance appears across the is common base pair Q3 to Q6 (refer to the Simplified summing nodes in Over-The-Top operation and is due to Schematic). If the input common mode is biased between the common base input stage configuration. Its value is V– and approximately 1.5V below V+, the amplifier is said easily derived from the specified input bias current flowing to be operating in the normal configuration. The differential into the op amp inputs and is equal to 2 • k • T/(q • Ib) input pair which control amplifier operation is common (k-Boltzmann’s constant, T – operating temperature, emitter pair Q1 and Q2. Ib-operating input bias current of the amplifier in the Over-The-Top region). And because the inputs are biased A plot of the Over-The-Top Transition region vs Temperature proportional to absolute temperature, it is relatively (the region between normal operation and Over-The-Top constant with temperature. The user may think this operation) on a 5V single supply is shown in Figure 2. effective resistance is relatively harmless because it appears across the summing nodes which are forced 601567ff 14 For more information www.linear.com/LT6015 VCM (V)

LT6015/LT6016/LT6017 applicaTions inForMaTion to 0V differential by feedback action of the amplifier. Likewise the closed loop bandwidth of the amplifier will However, depending on the configuration of the feedback change going from normal mode operation to Over-The- around the amplifier, this input resistance can boost noise Top operation: gain, lower overall amplifier loop gain and closed loop GBW bandwidth, raise output noise, with one benevolent effect Normal mode: BWCLOSED − LOOP ≈ R in increasing amplifier stability. 1+ F RI In the normal mode of operation (where V– < VCM < V+ –1.5V), RIN is typically large compared to the value of the Over-The-Top mode: input resistor used, and RIN can be ignored (refer to Figure 3). GBW In this case the noise gain is defined by the equation: BWCLOSED − LOOP ≈ + R 1 F RI|| (RIN +RI||RF) NOISEGAIN ≈ R 1+ F RI And output noise is negatively impacted going from normal mode to Over-The-Top: However, when the amplifier transitions into Over-The-Top mode with the input common mode biased near or above Normal mode: (neglecting resistor noise) the the V+ supply, RIN should be considered. The noise gain of the amplifier changes to: e ⎛ RF⎞ no ≈ eni • ⎝⎜1+ R ⎟⎠ NOISEGAIN = + R 1 F I RI|| (RIN +RI||RF) Over-The-Top mode: (neglecting resistor noise) RF 5V ⎛ RI e ≈ R e F ⎞ + no ni • ⎜1+ R ⎝ I || (RIN +RI||RF)V R ⎠⎟ IN IN LT6015 VOUT RI – VINCM Output RF 601567 F03 The output of the LT6015/LT6016/LT6017 can swing within + Figure 3. Difference Amplifier Configured for Both a Schottky diode drop (~0.4V) of the V supply, and within Normal and Over-The-Top Operation 5mV of the negative supply with no load. The output is capable of sourcing and sinking approximately 25mA. While it is true that the DC closed loop gain will remain The LT6015/LT6016/LT6017 are internally compensated mostly unaffected (= RF ), the loop gain of the amplifier to drive at least 200pF of capacitance under any output R loading conditions. For larger capacitive loads, a 0.22μF I capacitor in series with a 150Ω resistor between the out- AOL AOL put and ground will compensate these amplifiers to drive has decreased from RF to + RF capacitive loads greater than 200pF. 1+ 1 RI RI|| (RIN +RI||RF) 601567ff For more information www.linear.com/LT6015 15

LT6015/LT6016/LT6017 applicaTions inForMaTion Distortion In general, the die junction temperature (TJ) can be esti- There are two main contributors of distortion in op amps: mated from the ambient temperature TA, and the device output crossover distortion as the output transitions power dissipation PD: from sourcing to sinking current and distortion caused TJ = TA + PD • JA by nonlinear common mode rejection. If the op amp is The power dissipation in the IC is a function of supply operating in an inverting configuration there is no com- voltage and load resistance. For a given supply voltage, mon mode induced distortion. If the op amp is operating the worst-case power dissipation P occurs at the in the noninverting configuration within the normal input D(MAX) maximum supply current with the output voltage at half common mode range (V– to V+ –1.5V) the CMRR is very of either supply voltage (or the maximum swing is less good, typically over 120dB. When the LT6015/LT6016/ than one-half the supply voltage). P is given by: LT6017 transitions input stages going from the normal D(MAX) input stage to the Over-The-Top input stage or vice-versa, PD(MAX) = (VS • I 2 S(MAX)) + (VS/2) /RLOAD there will be a significant degradation in linearity due to Example: An LT6016 in a MSOP package mounted on a PC the change in input circuitry. board has a thermal resistance of 273°C/W. Operating on Lower load resistance increases distortion due to a net ±25V supplies with both amplifiers simultaneously driving decrease in loop gain, and greater voltage swings internal 2.5kΩ loads, the worst-case IC power dissipation for the to the amp necessary to drive the load, but has no effect on given load occurs when driving 12.5VPEAK and is given by: the input stage transition distortion. The lowest distortion PD(MAX) = 2 • 50 • 0.6mA + 2 • (12.5)2/2500 = 0.185W can be achieved with the LT6015/LT6016/LT6017 sourcing in class-A operation in an inverting configuration, with the With a thermal resistance of 273°C/W, the die temperature input common mode biased mid-way between the supplies. will experience approximately a 50°C rise above ambient. This implies the maximum ambient temperate the LT6016 Power Dissipation Considerations should ever operate under the assumed conditions: Because of the ability of the LT6015/LT6016/LT6017 to TA = 150°C – 50°C = 100°C operate on power supplies up to ±25V and to drive heavy To operate to higher ambient temperatures, use two chan- loads, there is a need to ensure the die junction tempera- nels of the LT6017 quad which has lower thermal resistance ture does not exceed 150°C. The LT6015 is housed in a JA = 31.8°C/W, and an exposed pad which may be soldered 5-lead TSOT-23 package (JA = 250°C/W). The LT6016 down to a copper plane (connected to V–) to further lower is housed in an 8-lead MSOP package (JA = 273°C/W). the thermal resistance below JA = 31.8°C/W. The LT6017 is housed in a 22 pin leadless DFN package (DJC22, JA = 31.8°C/W). 601567ff 16 For more information www.linear.com/LT6015

LT6015/LT6016/LT6017 siMpliFieD scheMaTic V+ Q10 I1 I3 I4 D3 PNP 16µA 8µA 8µA R5 M2 M1 40k PMOS PMOS Q9 R1, 1k PNP –IN I2 P R2, 1k Q2 Q1 CLASS AB OUT 5µA +IN PNP PNP ADJUST N Q3 Q4 Q6 PNP PNP Q5 PNP PNP Q7 Q8 NPN NPN Q13 Q11 Q12 NPN NPN NPN D1 D2 R3 R4 6k 6k D4 V– 601567 SS Typical applicaTions Gain of 100 High Voltage Difference Amplifier with –5V/75V Common Mode Range CMRR ADJUST 97.6k 5k 1k 5V + + VIN LT6015 VOUT = 100 • VIN – 1k + – VCM –5V – 100k 601567 TA02 Wide Input Range Current Sense Amp Goes Hi-Z When VSUPPLY Removed V = 0.2V TO 76V VSUPPLY SOURCE 0.1µF R1 200Ω R6 + 100Ω 0.1Ω 1% ISENSE R2 R LT6016 BSP89 SENSE 200Ω – + R3 LOAD 200Ω LT6016 – 1N4148* R5 VSUPPLY = 3V TO 60V 10k VOUT R4 R5 200Ω VOUT =R ⎛ ⎞ SENSE • ISENSE ⎜1+ ⎝ R4⎟⎠ *DIODE IMPROVES OUTPUT SWING LOW 601567 TA04 601567ff For more information www.linear.com/LT6015 17

LT6015/LT6016/LT6017 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DJC Package 22-Lead Plastic DFN (6mm × 3mm) (Reference LTC DWG # 05-08-1714 Rev Ø) 0.889 0.70 ±0.05 R = 0.10 3.60 ±0.05 1.65 ±0.05 0.889 2.20 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 5.35 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3. DRAWING IS NOT TO SCALE R = 0.115 6.00 ±0.10 0.889 TYP 0.40 ±0.05 (2 SIDES) 12 22 R = 0.10 TYP 3.00 ±0.10 1.65 ±0.10 0.889 (2 SIDES) (2 SIDES) PIN 1 TOP MARK (NOTE 6) PIN #1 NOTCH R0.30 TYP OR 11 1 0.200 REF 0.75 ±0.05 0.25 ±0.05 0.25mm × 45° CHAMFER 0.50 BSC 5.35 ±0.10 (2 SIDES) (DJC) DFN 0605 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WXXX) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 601567ff 18 For more information www.linear.com/LT6015

LT6015/LT6016/LT6017 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev G) 0.889 ±0.127 (.035 ±.005) 5.10 (.201) 3.20 – 3.45 MIN (.126 – .136) 3.00 ±0.102 0.42 ± 0.038 0.65 (.118 ±.004) 0.52 (.0165 ±.0015) (.0256) (NOTE 3) 8 7 6 5 (.0205) TYP BSC REF RECOMMENDED SOLDER PAD LAYOUT 4.90 ±0.152 3.00 ±0.102 DETAIL “A” (.193 ±.006) (.118 ±.004) 0.254 (NOTE 4) (.010) 0° – 6° TYP GAUGE PLANE 1 2 3 4 0.53 ±0.152 (.021 ±.006) 1.10 0.86 (.043) (.034) DETAIL “A” MAX REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 0.1016 ±0.0508 (.009 – .015) 0.65 (.004 ±.002) TYP MSOP (MS8) 0213 REV G NOTE: (.0256) 1. DIMENSIONS IN MILLIMETER/(INCH) BSC 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 601567ff For more information www.linear.com/LT6015 19

LT6015/LT6016/LT6017 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S5 Package 5-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1635) 0.62 0.95 MAX REF 2.90 BSC (NOTE 4) 1.22 REF 1.50 – 1.75 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC (NOTE 4) PIN ONE RECOMMENDED SOLDER PAD LAYOUT 0.95 BSC 0.30 – 0.45 TYP PER IPC CALCULATOR 5 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 1.90 BSC NOTE: (NOTE 3) S5 TSOT-23 0302 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 601567ff 20 For more information www.linear.com/LT6015