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デジタイザNETBOX DN2.44x 14/16ビット、130MS/s, 250MS/s, 500MS/、2~8チャネル
製品カタログ
デジタイザNETBOX DN2.44x 14/16ビット、130MS/s, 250MS/s, 500MS/、2~8チャネル
デジタイザNETBOX DN2.44x 14/16ビット、130MS/s, 250MS/s, 500MS/、2~8チャネル
このカタログについて
ドキュメント名 | デジタイザNETBOX DN2.44x 14/16ビット、130MS/s, 250MS/s, 500MS/、2~8チャネル |
---|---|
ドキュメント種別 | 製品カタログ |
ファイルサイズ | 1.3Mb |
登録カテゴリ | |
取り扱い企業 | 株式会社エレクトロニカ IMT事業部 (この企業の取り扱いカタログ一覧) |
この企業の関連カタログ
このカタログの内容
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digitizerNETBOX
DN2.44x 14/16ビット、130MS/s, 250MS/s, 500MS/s、2~8チャネル
FPGAによる主な演算機能オプション
:ブロックアベレージ、ピーク検出
FPGAによる標準機能
:ボックスカーアベレージ
・サンプリングレート: 130MS/s, 250MS/s, 500MS/s 2 / 4 / 8チャネル
・入力抵抗 1MΩ/50Ω
・チャネル毎に独立した14/16ビットADおよびアンプによる全チャネル同時サンプリング
・6入力レンジ:±200mV~±10 V
・トリガ:ウィンドウ、ヒステレシス、OR/AND
・測定モード:シングルショット、Streaming、ABA、マルチレコード、ゲーティドレコード
Time Stamp
・PCとの接続:イーサネット
・DC駆動オプション(12V, 24V)あり
製品名 分解能 入力チャネル サンプリングレート 帯域
DN2.441-02 16 2 130MS/s 65MHz
DN2.441-04 16 4 130MS/s 65MHz
DN2.441-08 16 8 130MS/s 65MHz
DN2.442-02 16 2 250MS/s 125MHz
DN2.442-04 16 4 250MS/s 125MH
DN2.442-08 16 8 250MS/s 125MH
DN2.445-02 14 2 500MS/s 250MHz
DN2.445-04 14 4 500MS/s 250MHz
DN2.445-08 14 8 500MS/s 250MHz
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DN2.44x - 8 channel 14/16 bit digitizerNETBOX up to 500 MS/s
• 2, 4 or 8 channels with 130 MS/s up to 500 MS/s New digitizerNETBOX V2
• Simultaneously sampling on all channels • Bumpers
• Separate ADC and amplifier per channel • Stackable
• complete on-board calibration • Handle• GND Screw
• 6 input ranges: ±200 mV up to ±10 V
• 4 GSample/2 GSample standard acquisition memory FPGA Options:
• Window, re-arm, hysteresis, OR/AND trigger
• Features: Single-Shot, Streaming, ABA mode, Multiple • Block Average up to 128k
Recording, Gated Sampling, Timestamps • Block Statistics/Peak Detect
• Ethernet Remote Instrument • Direct Connection to PC/Laptop
• LXI Core 2011 compatible • Connect anywhere in company LAN
• GBit Ethernet Interface • Embedded Webserver for Maintenance/Updates
• Sustained streaming mode up to 100 MB/s • Embedded Server option for open Linux platform
Operating Systems SBench 6 Professional Included Drivers
• Windows 7 (SP1), 8, 10, • Acquisition, Generation and Display of analog and • LabVIEW, MATLAB, LabWindows/CVI
Server 2008 R2 and newer digital data • C/C++, GNU C++, VB.NET, C#, J#,
• Linux Kernel 2.6, 3.x, 4.x, 5.x • Calculation, FFT Delphi, Java, Python
• Windows/Linux 32 and 64 bit • Documentation and Import, Export • IVI
Model Resolution 1 channel 2 channels 4 channels 8 channels General Information
DN2.445-08 14 Bit 500 MS/s 500 MS/s 500 MS/s 500 MS/s The digitizerNETBOX DN2.44x series allows recording of
DN2.445-04 14 Bit 500 MS/s 500 MS/s 500 MS/s up to 8 channels with sampling rates of 500 MS/s. These
DN2.445-02 14 Bit 500 MS/s 500 MS/s Ethernet Remote instruments offer outstanding A/D features
DN2.442-08 16 Bit 250 MS/s 250 MS/s 250 MS/s 250 MS/s both in resolution and signal quality. The combination of
DN2.442-04 16 Bit 250 MS/s 250 MS/s 250 MS/s
DN2.442-02 16 Bit 250 MS/s 250 MS/s high sampling rate and resolution makes these digitizers
DN2.441-08 16 Bit 130 MS/s 130 MS/s 130 MS/s 130 MS/s the top-of-the-range for applications that require
DN2.441-04 16 Bit 130 MS/s 130 MS/s 130 MS/s high-quality signal acquisition
DN2.441-02 16 Bit 130 MS/s 130 MS/s The digitizerNETBOX can be installed anywhere in the
company LAN and can be remotely controlled from a host
Export-Versions PC.
Sampling rate restricted versions that do not fall under export restrictions.
DN2.448-08 14 Bit 400 MS/s 400 MS/s 400 MS/s 400 MS/s
DN2.448-04 14 Bit 400 MS/s 400 MS/s 400 MS/s
DN2.448-02 14 Bit 400 MS/s 400 MS/s
DN2.447-08 16 Bit 180 MS/s 180 MS/s 180 MS/s 180 MS/s
DN2.447-04 16 Bit 180 MS/s 180 MS/s 180 MS/s
DN2.447-02 16 Bit 180 MS/s 180 MS/sSPECTRUM INSTRUMENTATION GMBH · AHRENSFELDER WEG 13-17 · 22927 GROSSHANSDORF · GERMANY 7.5.2020
PHONE: +49 (0)4102-6956-0 · FAX: +49 (0)4102-6956-66 · E-MAIL: info@spec.de · INTERNET: www.spectrum-instrumentation.com
Page3
digitizerNETBOX/generatorNETBOX. To maximize the compatibil-
ity with existing IVI based software installations, the Spectrum IVI
Software Support driver supports IVI Scope, IVI Digitizer and IVI FGen class with IVI-
C and IVI-COM interfaces.
Windows Support
The digitizerNETBOX/generatorNETBOX can be accessed from Third-party Software Products
Windows 7, Windows 8,Windows 10 (each 32 bit and 64 bit). Most popular third-party software products, such as LabVIEW,
Programming examples for Visual C++, C++ Builder, LabWin- MATLAB or LabWindows/CVI are supported. All drivers come
dows/CVI, Delphi, Visual Basic, VB.NET, C#, J#, Python, Java and with examples and detailed documentation.
IVI are included.
Embedded Webserver
Linux Support
The integrated webserver
The digitizerNETBOX/generatorNETBOX can be access- follows the LXI standard
ed from any Linux system. The Linux support includes SMP and gathers information
systems, 32 bit and 64 bit systems, versatile program- on the product, set up of
ming examples for Gnu C++, Python as well as drivers for the Ethernet configuration
MATLAB for Linux. SBench 6, the powerful data acquisi- and current status. It also
tion and analysis software from Spectrum is also included as a Linux allows the setting of a con-
version. figuration password, ac-
cess to documentation
Discovery Protocol and updating of the com-
The Discovery function plete instrument firmware,
helps you to find and including the embedded
identify any Spectrum LXI remote server and the
instruments, like the webserver.
digitizerNETBOX and
generatorNETBOX, avail- Hardware features and options
able to your computer on the network. The Discovery function will
also locate any Spectrum card products that are managed by an
installed Spectrum Remote Server somewhere on the network. LXI Instrument
The digitizerNETBOX and
After running the discovery function the card information is cached generatorNETBOX are fully
and can be directly accessed by SBench 6. Furthermore the quali- LXI instrument compatible
fied VISA address is returned and can be used by any software to to LXI Core 2011 following
access the remote instrument. the LXI Device Specification
2011 rev. 1.4. The digitizerNETBOX/generatorNETBOX has been
tested and approved by the LXI Consortium.
SBench 6 Professional
The digitizerNETBOX and Located on the front panel is the main on/off switch, LEDs showing
generatorNETBOX can be used the LXI and Acquisition status and the LAN reset switch.
with Spectrum’s powerful software
SBench 6 – a Professional license digitizerNETBOX/generatorNETBOX chassis version V2
for the software is already in-
stalled in the box. SBench 6 sup- The chassis version V2 got
ports all of the standard features of a complete re-design to al-
the instrument. It has a variety of low some new features
display windows as well as analy- that improve the handling
sis, export and documentation especially for mobile and
functions. shared usage:
• Available for Windows XP, Vista, Windows 7, Windows 8, • 8 bumper edges protect the chassis, the desk and other compo-
Windows 10 and Linux nents on it. The bumper edges allow to store the chassis either
• Easy to use interface with drag and drop, docking windows and vertically or horizontally and the lock-in structure allows to stack
context menus multiple chassis with a secure fit onto each other. For 19“ rack
• Display of analog and digital data, X-Y display, frequency mount montage the bumpers can be unmounted and replaced
domain and spread signals by the 19“ rack mount option
• Designed to handle several GBytes of data • The handle allows to easily carry the chassis around in juts one
• Fast data preview functions hand. • A standard GND screw on the back of the chassis allows to con-
nect the metal chassis to measurement ground to reduce noise
IVI Driver based on ground loops and ground level differences.
The IVI standards define an open driver architecture, a set of instru-
ment classes, and shared software components. Together these pro- Front Panel
vide critical elements needed for instrument interchangeability. IVI's Standard SMA connectors are used for
defined Application Programming Interfaces (APIs) standardize all analog input signals and all trigger
common measurement functions reducing the time needed to learn and clock signals. No special adapter
a new IVI instrument. cables are needed and the connection is
secure even when used in a moving envi-
The Spectrum products to be accessed with the IVI driver can be lo- ronment.
cally installed data acquisition cards, remotely installed data acqui-
sition cards or remote LXI instruments like
Page4
Custom front panels are available on request even for small series, Digital inputs
be it BNC, LEMO connectors or custom specific connectors. This option acquires additional syn-
chronous digital channels phase-
Ethernet Connectivity stable with the analog data. As de-
The GBit Ethernet connection can be fault a maximum of 3 additional
used with standard COTS Ethernet digital inputs are available on the front plate of the card using the
cabling. The integration into a stan- multi-purpose I/O lines. An additional option offers 16 more digital
dard LAN allows to connect the channels.
digitizerNETBOX/generatorNET-
BOX either directly to a desktop PC Ring buffer mode
or Laptop or it is possible to place The ring buffer mode is the
the instrument somewhere in the standard mode of all oscillo-
company LAN and access it from any desktop over the LAN. scope instruments. Digitized
data is continuously written
DC Power Supply Option into a ring memory until a
The digitizerNETBOX/generatorNET- trigger event is detected. After the trigger, post-trigger samples are
BOX can be equipped with an internal recorded and pre-trigger samples can also be stored. The number
DC power supply which replaces the of pre-trigger samples available simply equals the total ring mem-
standard AC power supply. Two dif- ory size minus the number of post trigger samples.
ferent power supply options are avail-
able that range from 9V to 36V. FIFO mode
Contact the sales team if other DC lev- The FIFO mode is designed for continuous data transfer between re-
els are required. mote instrument and PC memory or hard disk. The control of the
data stream is done automatically by the driver on interrupt request.
Using the DC power supply the digitiz- The complete installed on-board memory is used for buffer data,
erNETBOX/generatorNETBOX can be used for mobile applications making the continuous streaming extremely reliable.
together with a Laptop in automotive or airborne applications.
Channel trigger
Boot on Power on Option The data acquisition instruments offer a wide variety of trigger
The digitizerNETBOX/generatorNETBOX can be factory config- modes. Besides the standard signal checking for level and edge as
ured to automatically start and boot upon availability of the input known from oscilloscopes it’s also possible to define a window trig-
power rail. That way the instrument will automatically become ger. All trigger modes can be combined with the pulsewidth trigger.
available again upon loss of input power. This makes it possible to trigger on signal errors like too long or too
short pulses. In addition to this a re-arming mode (for accurate trig-
Input Amplifier ger recognition on noisy signals) the AND/OR conjunction of dif-
The analog inputs can be adapt- ferent trigger events is possible. As a unique feature it is possible to
ed to real world signals using a use deactivated channels as trigger sources.
wide variety of settings that are
individual for each channel. By External trigger input
using software commands the in- All boards can be triggered using up to two external analog or dig-
put termination can be changed ital signals. One external trigger input has two analog comparators
between 50 Ohm and 1 MOhm, one can select a matching input that can define an edge or window trigger, a hysteresis trigger or
range and the signal offset can be compensated by programmable a rearm trigger. The other input has one comparator that can be
AC coupling. The latest hardware revisions additionally allow for used for standard edge and level triggers.
offset compensation for DC-coupled inputs as well.
Multiple Recording
Software selectable input path The Multiple Recording
For each of the analog channels the user has the choice between mode allows the recording of
two analog input paths. The „Buffered“ path offers the highest flex- several trigger events with an
ibility when it comes to input ranges and termination. A software extremely short re-arming
programmable 50 Ohm and 1 MOhm termination also allows to time. The hardware doesn’t
connect standard oscilloscope probes to the card. The „50 Ohm“ need to be restarted in be-
path on the other hand provides the highest bandwidth and the best tween. The on-board memory is divided in several segments of the
signal integrity with a fewer number of input ranges and a fixed 50 same size. Each of them is filled with data if a trigger event occurs.
Ohm termination. Pre- and posttrigger of the segments can be programmed. The num-
ber of acquired segments is only limited by the used memory and
Software selectable lowpass filter is unlimited when using FIFO mode.
Each analog channel contains a software selectable low-pass filter
to limit the input bandwidth. Reducing the analog input bandwidth Gated Sampling
results in a lower total noise and can be useful especially with low The Gated Sampling mode
voltage input signals. allows data recording con-
trolled by an external gate
Automatic on-board calibration signal. Data is only record-
Every channel of each card is calibrated in the factory before the ed if the gate signal has a
board is shipped. However, to compensate for environmental vari- programmed level. In addi-
ations like PC power supply, temperature and aging the software tion a pre-area before start
driver includes routines for automatic offset and gain calibration. of the gate signal as well as a post area after end of the gate signal
This calibration is performed on all input ranges of the "Buffered" can be acquired. The number of gate segments is only limited by
path and uses a high precision onboard calibration reference. the used memory and is unlimited when using FIFO mode.
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Timestamp Firmware Option Block Statistics (Peak Detect)
The timestamp function The Block Statistics and Peak
writes the time positions of Detect Module implements a
the trigger events in an extra widely used data analysis and
memory. The timestamps are reduction technology in hard-
relative to the start of record- ware. Each block is scanned
ing, a defined zero time, ex- for minimum and maximum
ternally synchronized to a radio clock, an IRIG-B a GPS receiver. peak and a summary includ-
Using the external synchronization gives a precise time relation for ing minimum, maximum, aver-
acquisitions of systems on different locations. age, timestamps and position information is stored in memory. The
complete averaging process is done inside the FPGA of the digitiz-
ABA mode er generating no CPU load at all. The amount of data is greatly de-
The ABA mode com- creased as well as the needed transfer bandwidth is heavily
bines slow continuous reduced.
data recording with fast
acquisition on trigger Please see separate data sheet for details on the firmware option.
events. The ABA mode
works like a slow data Option Embedded Server
logger combined with a The option turns the digitizer-
fast digitizer. The exact NETBOX/generatorNETBOX
position of the trigger events is stored as timestamps in an extra in a powerful PC that allows to
memory. run own programs on a small
and remote data acquisition
Boxcar Average (high-resolution) mode system. The digitizerNET-
The Boxcar average or high- BOX/generatorNETBOX is en-
resolution mode is a form of hanced by more memory, a powerful CPU, a freely accessable
averaging. The ADC over- internal SSD and a remote software development access method.
samples the signal and aver-
ages neighboring points The digitizerNETBOX/generatorNETBOX can either run connected
together. This mode uses a to LAN or it can run totally independent, storing data to the internal
real-time boxcar averaging SSD. The original digitizerNETBOX/generatorNETBOX remote in-
algorthm that helps reducing strument functionality is still 100 % available. Running the embed-
random noise. It also can ded server option it is possible to pre-calculate results based on the
yield a higher number of bits of resolution depening on the signal acquired data, store acquisitions locally and to transfer just the re-
acquired. The averaging factor can be set in the region of 2 to 256. quired data or results parts in a client-server based software struc-
Averaged samples are stored as 32 bit values and can be pro- ture. A different example for the
cessed by any software. The trigger detection is still running with digitizerNETBOX/generatorNETBOX embedded server is surveil-
full sampling speed allowing a very precise relation between ac- lance/logger application which can run totally independent for
quired signal and the trigger. days and send notification emails only over LAN or offloads stored
data as soon as it’s connected again.
8bit Sample reduction (low-resolution) mode Access to the embedded server is done through a standard text
The cards and digitizerNETBOXes of the 44xx series allow to op- based Linux shell based on the ssh secure shell.
tionally reduce the resolution of the A/D samples from their native
14 bit or 16 bit down to 8bit resolution, such that each sample will External clock input and output
only occupy one byte in memory instead of the standard two bytes
required. This does not only enhance the size of the on-board mem- Using a dedicated connector a sampling clock can be fed in from
ory from 2 GSamples to effectively 4 Gsamples, but also reduces an external system. Additionally it’s also possible to output the in-
the required bandwidth over the PCIe bus and also to the storage ternally used sampling clock on a separate connector to synchro-
devices, such as SSD or HDD. nize external equipment to this clock.
Firmware Option Block Average Reference clock
The Block Average Module im- The option to use a precise
proves the fidelity of noisy re- external reference clock
petitive signals. Multiple (normally 10 MHz) is nec-
repetitive acquisitions with essary to synchronize the
very small dead-time are accu- instrument for high-quality
mulated and averaged. Ran- measurements with external equipment (like a signal source). It’s
dom noise is reduced by the also possible to enhance the quality of the sampling clock in this
averaging process improving way. The driver automatically generates the requested sampling
the visibility of the repetitive signal. The complete averaging pro- clock from the fed in reference clock.
cess is done inside the FPGA of the digitizer generating no CPU
load at all. The amount of data is greatly decreased as well as the Export Versions
needed transfer bandwidth is heavily reduced. Special export versions of the products are available that do not fall
under export control. Products fall under export control if their spec-
Please see separate data sheet for details on the firmware option. ification exceeds certain sampling rates at a given A/D resolution
and if the product is shipped into a country where no general ex-
port authorization is in place.
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The export versions of the products have a sampling rate limitation matching the export control list. An upgrade to the faster version is not
possible. The sampling rate limitation is in place for both internal and external clock.
DN2 / DN6 Technical Data
Analog Inputs
Resolution 130 MS/s up to 250 MS/s 16 bit (441, 442, 447)
400 MS/s and 500 MS/s 14 bit (445, 448)
Input Type Single-ended
ADC Differential non linearity (DNL) ADC only ±0.5 LSB (14 Bit ADC), ±0.4 LSB (16 Bit ADC)
ADC Integral non linearity (INL) ADC only ±2.5 LSB (14 Bit ADC), ±10.0 LSB (16 Bit ADC)
ADC Word Error Rate (WER) max. sampling rate 10-12
Channel selection software programmable 1, 2, or 4 (maximum is model dependent)
Bandwidth filter activate by software 20 MHz bandwidth with 3rd order Butterworth filtering
Input Path Types software programmable 50 Ω (HF) Path Buffered (high impedance) Path
Analog Input impedance software programmable 50 Ω 1 MΩ || 25 pF or 50 Ω
Input Ranges software programmable ±500 mV, ±1 V, ±2.5 V, ±5 V ±200 mV, ±500 mV, ±1 V, ±2 V, ±5 V, ±10 V
Programmable Input Offset Frontend HW-Version < V9 not available not available
Programmable Input Offset Frontend HW-Version >= V9 –100%..0% on all ranges –100%..0% on all ranges except ±1 V and ±10 V
Input Coupling software programmable AC/DC AC/DC
Offset error (full speed) after warm-up and calibration < 0.1% of range < 0.1% of range
Gain error (full speed) after warm-up and calibration < 1.0% of reading < 1.0% of reading
Over voltage protection range ≤ ±1V 2 Vrms ±5 V (1 MΩ), 5 Vrms (50 Ω)
Over voltage protection range ≥ ±2V 6 Vrms ±30 V (1 MΩ), 5 Vrms (50 Ω)
Max DC voltage if AC coupling active ±30 V ±30 V
Relative input stage delay Bandwidth filter disabled: 0 ns Bandwidth filter disabled: 3.8 ns
Bandwidth filter enabled: 14.7 ns Bandwidth filter enabled: 18.5 ns
Crosstalk 1 MHz sine signal range ±1V ≤96 dB ≤93 dB
Crosstalk 20 MHz sine signal range ±1V ≤82 dB ≤82 dB
Crosstalk 1 MHz sine signal range ±5V ≤97 dB ≤85 dB
Crosstalk 20 MHz sine signal range ±5V ≤82 dB ≤82 dB
M4i.441x M4i.442x M4i.445x M4i.447x M4i.448x
M4x.441x M4x.442x M4x.445x M4x.447x M4x.448x
DN2.441-xx DN2.442-xx DN2.445-xx DN2.447-xx DN2.448-xx
DN6.441-xx DN6.442-xx DN6.445-xx DN6.447-xx DN6.448-xx
lower bandwidth limit (DC coupling) 0 Hz 0 Hz 0 Hz 0 Hz 0 Hz
lower bandwidth limit (AC coupled, 50 Ω) < 30 kHz < 30 kHz < 30 kHz < 30 kHz < 30 kHz
lower bandwidth limit (AC coupled, 1 MΩ) < 2 Hz < 2 Hz < 2 Hz < 2 Hz < 2 Hz
-3 dB bandwidth (HF path, AC coupled, 50 Ω) 65 MHz 125 MHz 250 MHz 125 MHz 250 MHz
Flatness within ±0.5 dB (HF path, AC coupled, 50 Ω) 40 MHz 80 MHz 160 MHz 80 MHz 160 MHz
-3 dB bandwidth (Buffered path, DC coupled, 1 MΩ) 50 MHz 85 MHz 85 MHz (V1.1) 85 MHz 125 MHz (V1.2)
125 MHz (V1.2)
-3 dB bandwidth (bandwidth filter enabled) 20 MHz 20 MHz 20 MHz 20 MHz 20 MHz
Trigger
Available trigger modes software programmable Channel Trigger, External, Software, Window, Re-Arm, Or/And, Delay, PXI (M4x only)
Channel trigger level resolution software programmable 14 bit
Trigger engines 1 engine per channel with two individual levels, 2 external triggers
Trigger edge software programmable Rising edge, falling edge or both edges
Trigger delay software programmable 0 to (8GSamples - 16) = 8589934576 Samples in steps of 16 samples
Multi, Gate, ABA: re-arming time 40 samples (+ programmed pretrigger)
Pretrigger at Multi, ABA, Gate, FIFO, Boxcar software programmable 16 up to [8192 Samples in steps of 16)
Posttrigger software programmable 16 up to 8G samples in steps of 16 (defining pretrigger in standard scope mode)
Memory depth software programmable 32 up to [installed memory / number of active channels] samples in steps of 16
Multiple Recording/ABA segment size, Boxcar software programmable 32 up to [installed memory / 2 / active channels] samples in steps of 16
Trigger accuracy (all sources) 1 sample
Boxcar (high-resolution) average factor software programmable 2, 4, 8, 16, 32, 64, 128 or 256
Timestamp modes software programmable Standard, Startreset, external reference clock on X0 (e.g. PPS from GPS, IRIG-B)
Data format Std., Startreset: 64 bit counter, increments with sample clock (reset manually or on start)
RefClock: 24 bit upper counter (increment with RefClock)
40 bit lower counter (increments with sample clock, reset with RefClock)
Extra data software programmable none, acquisition of X0/X1/X2 inputs at trigger time, trigger source (for OR trigger)
Size per stamp 128 bit = 16 bytes
Page7
Trigger edge software programmable Rising edge, falling edge or both edges
External trigger Ext0 Ext1
External trigger impedance software programmable 50 Ω /1 kΩ 1 kΩ
External trigger coupling software programmable AC or DC fixed DC
External trigger type Window comparator Single level comparator
External input level ±10 V (1 kΩ), ±2.5 V (50 Ω), ±10 V
External trigger sensitivity 2.5% of full scale range 2.5% of full scale range = 0.5 V
(minimum required signal swing)
External trigger level software programmable ±10 V in steps of 10 mV ±10 V in steps of 10 mV
External trigger maximum voltage ±30V ±30 V
External trigger bandwidth DC 50 Ω DC to 200 MHz n.a.
1 kΩ DC to 150 MHz DC to 200 MHz
External trigger bandwidth AC 50 Ω 20 kHz to 200 MHz n.a.
Minimum external trigger pulse width ≥ 2 samples ≥ 2 samples
Frequency Response M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx
Sampling Rate 500 MS/s
HF Path 50 Ω, AC coupling, no filter
Buffered Path 1 MΩ, AC Coupling, no filter
Frequency Response M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx
Sampling Rate 250 MS/s
HF Path 50 Ω, AC coupling, no filter
Buffered Path 1 MΩ, AC Coupling, no filter
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Frequency Response M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx
Sampling Rate 130 MS/s
HF Path 50 Ω, AC coupling, no filter
Buffered Path 1 MΩ, AC Coupling, no filter
Clock
Clock Modes software programmable internal PLL, external reference clock, Star-Hub sync (M4i only), PXI Reference Clock (M4x only)
Internal clock accuracy ≤ ±20 ppm
Internal clock setup granularity standard clock mode divider: maximum sampling rate divided by:
1, 2, 4, 8, 16, ... up to 131072 (full gain accuracy)
Internal clock setup granularity special clock mode only 1 Hz (reduced gain accuracy when using special clock mode), not available when synchroniz-
ing multiple cards
Clock setup range gaps special clock mode only unsetable clock speeds: 17.5 MHz to 17.9 MHz, 35.1 MHz to 35.8 MHz, 70 MHz to 72 MHz,
140 MHz to 144 MHz, 281 MHz to 287 MHz
External reference clock range software programmable ≥ 10 MHz and ≤ 1 GHz
External reference clock input impedance 50 Ω fixed
External reference clock input coupling AC coupling
External reference clock input edge Rising edge
External reference clock input type Single-ended, sine wave or square wave
External reference clock input swing 0.3 V peak-peak up to 3.0 V peak-peak
External reference clock input max DC voltage ±30 V (with max 3.0 V difference between low and high level)
External reference clock input duty cycle requirement 45% to 55%
Internal ADC clock output type Single-ended, 3.3V LVPECL
Internal ADC clock output frequency standard clock mode Fixed to maximum sampling rate (500 MS/s, 250 MS/s or 130 MS/s depending on type)
Internal ADC clock output frequency special clock mode 445x models (500 MS/s): ADC clock in the range between 80 MS/s and 500 MS/s
448x models (400 MS/s): ADC clock in the range between 80 MS/s and 400 MS/s
442x models (250 MS/s): ADC clock in the range between 40 MS/s and 250 MS/s
447x models (180 MS/s): ADC clock in the range between 40 MS/s and 180 MS/s
441x models (130 MS/s): ADC clock in the range between 40 MS/s and 130 MS/s
Star-Hub synchronization clock modes software selectable Standard clock mode with internal reference (maxmimum clock + divider),
Standard clock mode with external reference (maxmimum clock + divider)
special clock mode not allowed, except:
445 series (500 MS/s) can also run with 400 MS/s and divided clock for synchronization
442 series (250 MS/s) can also run with 180 MS/s and divided clock for synchronization
ABA mode clock divider for slow clock software programmable 16 up to (128k - 16) in steps of 16
Channel to channel skew on one card < 60 ps (typical)
Skew between star-hub synchronized cards < 130 ps (typical, preliminary)
M4i.441x M4i.442x M4i.445x M4i.447x M4i.448x
M4x.441x M4x.442x M4x.445x M4x.447x M4x.448x
DN2.441-xx DN2.442-xx DN2.445-xx DN2.447-xx DN2.448-xx
DN6.441-xx DN6.442-xx DN6.445-xx DN6.447-xx DN6.448-xx
ADC Resolution 16 bit 16 bit 14 bit 16 bit 14 bit
max sampling clock 130 MS/s 250 MS/s 500 MS/s 180 MS/s 400 MS/s
min sampling clock (standard clock mode) 3.814 kS/s 3.814 kS/s 3.814 kS/s 3.814 kS/s 3.814 kS/s
min sampling clock (special clock mode) 0.610 kS/s 0.610 kS/s 0.610 kS/s 0.610 kS/s 0.610 kS/s
Page9
Block Average Signal Processing Option M4i.44xx/M4x.44xx/DN2.44x/DN6.44x Series
Firmware ≥ V1.14 (since August 2015) Firmware < V1.14
Minimum Waveform Length 32 samples 32 samples
Minimum Waveform Stepsize 16 samples 16 samples
Maximum Waveform Length 1 channel active 128 kSamples 32 kSamples
Maximum Waveform Length 2 channels active 64 kSamples 16 kSamples
Maximum Waveform Length 4 or more channels active 32 kSamples 8 kSamples
Minimum Number of Averages 2 2
Maximum Number of Averages 65536 (64k) 65536 (64k)
Data Output Format fixed 32 bit signed integer 32 bit signed integer
Re-Arming Time between waveforms 40 samples (+ programmed pretrigger) 40 samples (+ programmed pretrigger)
Re-Arming Time between end of average to start of Depending on programmed segment length, 40 samples (+ programmed pretrigger)
next average max 100 µs
Block Statistics Signal Processing Option M4i.44xx/M4x.44xx/DN2.44x/DN6.44x Series
Minimum Waveform Length 32 samples
Minimum Waveform Stepsize 16 samples
Maximum Waveform Length Standard Acquisition 2 GSamples / channels
Maximum Waveform Length FIFO Acquisition 2 GSamples
Data Output Format fixed 32 bytes statistics summary
Statistics Information Set per Waveform Average, Minimum, Maximum, Position Minimum, Position Maximum, Trigger Timestamp
Re-Arming Time between Segments 40 samples (+ programmed pretrigger)
Multi Purpose I/O lines (front-plate)
Number of multi purpose lines three, named X0, X1, X2
Input: available signal types software programmable Asynchronous Digital-In, Synchronous Digital-In, Timestamp Reference Clock
Input: impedance 10 kΩ to 3.3 V
Input: maximum voltage level -0.5 V to +4.0 V
Input: signal levels 3.3 V LVTTL
Input: bandwith 125 MHz
Output: available signal types software programmable Asynchronous Digital-Out, Trigger Output, Run, Arm, PLL Refclock, System Clock
Output: impedance 50 Ω
Output: signal levels 3.3 V LVTTL
Output: type 3.3V LVTTL, TTL compatible for high impedance loads
Output: drive strength Capable of driving 50 Ω loads, maximum drive strength ±48 mA
Output: update rate 14bit, 16 bit ADC resolution sampling clock
Output: update rate 8 bit ADC resolution Current sampling clock < 1.25 GS/s : sampling clock
Current sampling clock > 1.25 GS/s and < 2.50 GS/s : ½ sampling clock
Current sampling clock > 2.50 GS/s and < 5.00 GS/s : ¼ sampling clock
Connectors
Analog Channels SMA female (one for each single-ended input) Cable-Type: Cab-3mA-xx-xx
Clock Input SMA female Cable-Type: Cab-3mA-xx-xx
Clock Output SMA female Cable-Type: Cab-3mA-xx-xx
Trg0 Input SMA female Cable-Type: Cab-3mA-xx-xx
Trg1 Input SMA female Cable-Type: Cab-3mAxx-xx
X0/Trigger Output/Timestamp Reference Clock programmable direction SMA female Cable-Type: Cab-3mA-xx-xx
X1 programmable direction SMA female Cable-Type: Cab-3mA-xx-xx
X2 programmable direction SMA female Cable-Type: Cab-3mA-xx-xx
Option digitizerNETBOX/generatorNETBOX embedded server (DN2.xxx-Emb, DN6.xxx-Emb)
CPU Intel Quad Core 2 GHz
System memory 4 GByte RAM
System data storage Internal 128 GByte SSD
Development access Remote Linux command shell (ssh), no graphical interface (GUI) available
Accessible Hardware Full access to Spectrum instruments, LAN, front panel LEDs, RAM, SSD
Integrated operating system OpenSuse 12.2 with kernel 4.4.7.
Internal PCIe connection DN2.20, DN2.46, DN2.47, DN2.49, DN2.59, DN2.60 PCIe x1, Gen1
DN6.46, DN6.49, DN6.59
DN2.22, DN2.44, DN2.66 PCIe x1, Gen2
DN6.22, DN6.44, DN6.66
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Ethernet specific details
LAN Connection Standard RJ45
LAN Speed Auto Sensing: GBit Ethernet, 100BASE-T, 10BASE-T
LAN IP address programmable DHCP (IPv4) with AutoIP fall-back (169.254.x.y), fixed IP (IPv4)
Sustained Streaming speed DN2.20, DN2.46, DN2.47, DN2.49, DN2.60 up to 70 MByte/s
DN6.46, DN6.49
DN2.59, DN2.22, DN2.44, DN2.66 up to 100 MByte/s
DN6.59, DN6.22, DN6.44, DN6.66
Used TCP/UDP Ports Webserver: 80 mDNS Daemon: 5353
VISA Discovery Protocol: 111, 9757 UPNP Daemon: 1900
Spectrum Remote Server: 1026, 5025
Power connection details
Mains AC power supply Input voltage: 100 to 240 VAC, 50 to 60 Hz
AC power supply connector IEC 60320-1-C14 (PC standard coupler)
Power supply cord power cord included for Schuko contact (CEE 7/7)
Serial connection details (DN2.xxx with hardware ≥ V11)
Serial connection (RS232) For diagnostic purposes only. Do not use, unless being instructed by a Spectrum support agent.
Certification, Compliance, Warranty
EMC Immunity Compliant with CE Mark
EMC Emission Compliant with CE Mark
Product warranty 5 years starting with the day of delivery
Software and firmware updates Life-time, free of charge
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RMS Noise Level (Zero Noise), typical figures
M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx, 14 Bit 500 MS/s
M4i.448x, M4x.448x, DN2.448-xxx and DN6.448-xx, 14 Bit 400 MS/s
Input Range ±200 mV ±500 mV ±1 ±2 V ±2.5 V ±5 V ±10 V
Voltage resolution 24.4 µV 61.0 µV 122.1 µV 244.1 µV 305.2 µV 610.4 µV 1.22 mV
HF path, DC, fixed 50 Ω <1.9 LSB <116 µV <1.9 LSB <232 µV <1.9 LSB <580 µV <1.9 LSB <1.16 mV
Buffered path, full bandwidth <3.8 LSB <93 µV <2.7 LSB <165 µV <2.1 LSB <256 µV <3.8 LSB <928 µV <2.7 LSB <1.65 mV <2.0 LSB <2.44 mV
Buffered path, BW limit active <2.2 LSB <54 µV <2.0 LSB <122 µV <2.0 LSB <244 µV <3.2 LSB <781 µV <2.3 LSB <1.40 mV <2.0 LSB <2.44 mV
M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx, 16 Bit 250 MS/s
M4i.447x, M4x.447x, DN2.447-xx and DN6.447-xx, 16 Bit 180 MS/s
Input Range ±200 mV ±500 mV ±1 ±2 V ±2.5 V ±5 V ±10 V
Voltage resolution 6.1 µV 15.3 µV 30.5 µV 61.0 µV 76.3 µV 152.6 µV 305.2 µV
HF path, DC, fixed 50 Ω <6.9 LSB <53 µV <6.9 LSB <211 µV <6.9 LSB <526 µV <6.9 LSB <1.05 mV
Buffered path, full bandwidth <11 LSB <67 µV <7.8 LSB <119 µV <7.1 LSB <217 µV <12 LSB <732 µV <8.1 LSB <1.24 mV <7.1 LSB <2.17 mV
Buffered path, BW limit active <7.9 LSB <48 µV <7.0 LSB <107 µV <6.9 LSB <211 µV <9.8 LSB <598 µV <7.2 LSB <1.10 mV <7.1 LSB <2.17 mV
M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx, 16 Bit 130 MS/s
Input Range ±200 mV ±500 mV ±1 ±2 V ±2.5 V ±5 V ±10 V
Voltage resolution (1) 6.1 µV 15.3 µV 30.5 µV 61.0 µV 76.3 µV 152.6 µV 305.2 µV
HF path, DC, fixed 50 Ω <5.9 LSB <90 µV <5.9 LSB <180 µV <5.9 LSB <450 µV <5.9 LSB <900 µV
Buffered path, full bandwidth <8.5 LSB <52 µV <6.5 LSB <99 µV <5.9 LSB <180 µV <11 LSB <671 µV <7.0 LSB <1.07 mV <6.1 LSB <1.86 mV
Buffered path, BW limit active <7.0 LSB <43 µV <6.1 LSB <93 µV <5.9 LSB <180 µV <9.6 LSB <586 µV <6.7 LSB <1.02 mV <6.1 LSB <1.86 mV
Dynamic Parameters
M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx, 14 Bit 500 MS/s
M4i.448x, M4x.448x, DN2.448-xxx and DN6.448-xx, 14 Bit 400 MS/s
Input Path HF path, AC coupled, fixed 50 Ohm Buffered path, BW limit Buffered path, full BW
Test signal frequency 10 MHz 40 MHz 70 MHz 10 MHz 10 MHz 40 MHz 70 MHz
Input Range ±500mV ±1V ±2.5V ±5V ±1V ±1V ±200mV ±500mV ±1V ±500mV ±500mV ±500mV
THD (typ) (dB <-75.9 dB <-75.8 dB <-75.2 dB <-74.8 dB <-72.5 dB <-67.4 dB <-71.4 dB <-72.1 dB <-68.6 dB <-65.0 dB <-58.6 dB <-54.4 dB
SNR (typ) (dB) >67.8 dB >67.9 dB >68.0 dB >68.0 dB >69.5 dB >67.5 dB >67.5 dB >68.0 dB >68.1 dB >67.3 dB >65.8 dB >65.6 dB
SFDR (typ), excl. harm. (dB) >88.1 dB >88.6 dB >85.2 dB >85.3 dB >88.0 dB >87.8 dB >87.3 dB >88.4 dB >87.5 dB >89.0 dB >88.9 dB >88.8 dB
SFDR (typ), incl. harm. (dB) >80.1 dB >80.0 dB >77.4 dB >77.3 dB >74.0 dB >69.9 dB >78.1 dB >73.5 dB >69.8 dB >67.5 dB >60.8 dB >56.0 dB
SINAD/THD+N (typ) (dB) >67.2 dB >67.2 dB >67.2 dB >67.2 dB >67.7 dB >64.4 dB >66.5 dB >66.6 dB >65.3 dB >63.9 dB >57.9 dB >54.0 dB
ENOB based on SINAD (bit) >10.9 bit >10.9 bit >10.9 bit >10.9 bit >10.9 bit >10.4 bit >10.7 bit >10.8 bit >10.6 bit >10.3 bit >9.3 bit >8.7 bit
ENOB based on SNR (bit) >11.0 bit >11.0 bit >11.0 bit >11.0 bit >11.0 bit >10.9 bit >10.9 bit >11.0 bit >11.0 bit >10.9 bit >10.6 bit >10.6 bit
M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx, 16 Bit 250 MS/s
M4i.447x, M4x.447x, DN2.447-xx and DN6.447-xx, 16 Bit 180 MS/s
Input Path HF path, AC coupled, fixed 50 Ohm Buffered path, BW limit Buffered path, full BW
Test signal frequency 1 MHz 10 MHz 40 MHz 10 MHz 1 MHz 10 MHz 40 MHz
Input Range ±1V ±500mV ±1V ±2.5V ±5V ±1V ±200mV ±500mV ±1V ±500mV ±500mV ±500mV
THD (typ) (dB <-73.1 dB <-74.0 dB <-74.1 dB <-74.1 dB <-74.1 dB <-62.9 dB <-73.2 dB <-71.5 dB <-69.0 dB <-72.2 dB <-67.5 dB <49.8 dB
SNR (typ) (dB) >71.9 dB >71.5 dB >71.5 dB >71.6 dB >71.6 dB >71.8 dB >69.8 dB >71.0 dB >71.2 dB >71.7 dB >71.0 dB >69.0 dB
SFDR (typ), excl. harm. (dB) >92.1 dB >90.4 dB >90.8 dB >90.1 dB >89.7 dB >90.2 dB >92.1 dB >92.0 dB >92.1 dB >90.0 dB >91.4 dB >92.5 dB
SFDR (typ), incl. harm. (dB) >74.4 dB >75.4 dB >75.5 dB >75.5 dB >75.5 dB >64.5 dB >75.0 dB >73.1 dB >69.8 dB >74.7 dB >67.8 dB >50.0 dB
SINAD/THD+N (typ) (dB) >69.8 dB >69.6 dB >69.6 dB >69.6 dB >69.6 dB >62.2 dB >68.5 dB >68.2 dB >67.0 dB >68.8 dB >66.4 dB >48.9 dB
ENOB based on SINAD (bit) >11.3 bit >11.2 bit >11.2 bit >11.3 bit >11.3 bit >10.0 bit >11.1 bit >11.0 bit >10.8 bit >11.1 dB >10.7 bit >7.8 bit
ENOB based on SNR (bit) >11.7 bit >11.6 bit >11.6 bit >11.6 bit >11.6 bit >11.6 dB >11.3 bit >11.5 bit >11.5 bit >11.6 dB >11.5 bit >11.2 bit
M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx, 16 Bit 130 MS/s
Input Path HF path, AC coupled, fixed 50 Ohm Buffered path, BW limit Buffered path, full BW
Test signal frequency 1 MHz 10 MHz 10 MHz 1 MHz 10 MHz
Input Range ±1V ±500mV ±1V ±2.5V ±5V ±200mV ±500mV ±1V ±500mV ±500mV
THD (typ) (dB <-72.6 dB <-77.8 dB <-77.5 dB <-77.3 dB <-77.1 dB <-74.5 dB <-73.9 dB <-70.1 dB <-73.5 dB <73.4 dB
SNR (typ) (dB) >72.2 dB >71.8 dB >71.9 dB >72.0 dB >72.0 dB >69.8 dB >71.2 dB >71.3 dB >71.1 dB >71.0 dB
SFDR (typ), excl. harm. (dB) >92.4 dB >97.0 dB >96.0 dB >95.2 dB >94.8 dB >89.0 dB >94.0 dB >94.5 dB >88.8 dB >93.5 dB
SFDR (typ), incl. harm. (dB) >73.7 dB >78.6 dB >78.2 dB >75.2 dB >75.1 dB >77.6 dB >77.8 dB >71.5 dB >74.7 dB >73.1 dB
SINAD/THD+N (typ) (dB) >69.4 dB >70.8 dB >70.8 dB >70.9 dB >70.8 dB >69.0 dB >69.7 dB >68.2 dB >69.2 dB >69.2 dB
ENOB based on SINAD (bit) >11.2 bit >11.5 bit >11.5 bit >11.5 bit >11.5 bit >11.2 bit >11.3 bit >11.0 bit >11.2 bit >11.2 bit
ENOB based on SNR (bit) >11.7 bit >11.6 bit >11.6 bit >11.6 bit >11.6 bit >11.3 bit >11.5 bit >11.5 bit >11.6 bit >11.6 bit
Dynamic parameters are measured at ±1 V input range (if no other range is stated) and 50Ω termination with the samplerate specified in the table. Measured parameters are averaged
20 times to get typical values. Test signal is a pure sine wave generated by a signal generator and a matching bandpass filter. Amplitude is >99% of FSR. SNR and RMS noise parameters
may differ depending on the quality of the used PC. SNR = Signal to Noise Ratio, THD = Total Harmonic Distortion, SFDR = Spurious Free Dynamic Range, SINAD = Signal Noise and Dis-
tortion, ENOB = Effective Number of Bits.
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Noise Floor Plots (open inputs)
M4i.445x, M4x.445x, M4i.442x, M4x.442x, M4i.441x, M4x.441x,
DN2.445-xx, DN6.445-xx DN2.442-xx and DN6.442-xx DN2.441-xx and DN6.441-xx
Sampling Rate 500 MS/s Sampling Rate 250 MS/s Sampling Rate 130 MS/s
Buffered Path
1 MΩ, AC
±1 V range
HF Path
50 Ω, AC
±500 mV
DN2 specific Technical Data
Environmental and Physical Details DN2.xxx
Dimension of Chassis without connectors or bumpers L x W x H 366 mm x 267 mm x 87 mm
Dimension of Chassis with 19“ rack mount option L x W x H 366 mm x 482.6 mm x 87 mm (2U height)
Weight (1 internal acquisition/generation module) 6.3 kg, with rack mount kit: 6.8 kg
Weight (2 internal acquisition/generation modules) 6.7 kg, with rack mount kit 7.2 kg
Warm up time 20 minutes
Operating temperature 0°C to 40°C
Storage temperature -10°C to 70°C
Humidity 10% to 90%
Dimension of packing (single DN2) L x W x H 470 mm x 390 mm x 180 mm
Volume weight of Packing (single DN2) 7.0 kgs
Power Consumption
230 VAC 12 VDC 24 VDC
2 channel versions 0.30 A 65 W TBD TBD TBD TBD
4 channel versions 0.33 A 73 W TBD TBD TBD TBD
8 channel versions 0.50 A 110 W TBD TBD TBD TBD
MTBF
MTBF 100000 hours
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Block diagram of digitizerNETBOX DN2
Block diagram of digitzerNETBOX module DN2.44x
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Order Information
The digitizerNETBOX is equipped with a large internal memory for data storage and supports standard acquisition (Scope), FIFO acquisition
(streaming), Multiple Recording, Gated Sampling, ABA mode and Timestamps. Operating system drivers for Windows/Linux 32 bit and
64 bit, drivers and examples for C/C++, IVI (Scope and Digitizer class), LabVIEW (Windows), MATLAB (Windows and Linux), .NET, Delphi,
Java, Python and a Professional license of the oscilloscope software SBench 6 are included.
The system is delivered with a connection cable meeting your countries power connection. Additional power connections with other standards
are available as option.
digitizerNETBOX DN2 - Ethernet/LXI Interface
Order no. A/D Bandwidth Single-Ended Differential Sampling Speed Installed
Resolution Channels Channels Memory
DN2.441-02 16 Bit 65 MHz 2 channels - 130 MS/s 1 x 2 GS
DN2.441-04 16 Bit 65 MHz 4 channels - 130 MS/s 1 x 2 GS
DN2.441-08 16 Bit 65 MHz 8 channels - 130 MS/s 2 x 2 GS
DN2.442-02 16 Bit 125 MHz 2 channels - 250 MS/s 1 x 2 GS
DN2.442-04 16 Bit 125 MHz 4 channels - 250 MS/s 1 x 2 GS
DN2.442-08 16 Bit 125 MHz 8 channels - 250 MS/s 2 x 2 GS
DN2.445-02 14 Bit 250 MHz 2 channels - 500 MS/s 1 x 2 GS
DN2.445-04 14 Bit 250 MHz 4 channels - 500 MS/s 1 x 2 GS
DN2.445-08 14 Bit 250 MHz 8 channels - 500 MS/s 2 x 2 GS
DN2.447-02(1) 16 Bit 125 MHz 2 channels - 180 MS/s 1 x 2 GS
DN2.447-04(1) 16 Bit 125 MHz 4 channels - 180 MS/s 1 x 2 GS
DN2.447-08(1) 16 Bit 125 MHz 8 channels - 180 MS/s 2 x 2 GS
DN2.448-02(1) 14 Bit 250 MHz 2 channels - 400 MS/s 1 x 2 GS
DN2.448-04(1) 14 Bit 250 MHz 4 channels - 400 MS/s 1 x 2 GS
DN2.448-08(1) 14 Bit 250 MHz 8 channels - 400 MS/s 2 x 2 GS
(1) Export Version
Options
Order no. Option
DN2.xxx-Rack 19“ rack mounting set for self mounting
DN2.xxx-Emb Extension to Embedded Server: CPU, more memory, SSD. Access via remote Linux secure shell (ssh)
DN2.xxx-spavg Signal Processing Firmware Option: Block Average (later installation by firmware - upgrade available)
DN2.xxx-spstat Signal Processing Firmware Option: Block Statistics/Peak Detect (later installation by firmware - upgrade available)
DN2.xxx-DC12 12 VDC internal power supply. Replaces AC power supply. Accepts 9 V to 18 V DC input. Screw terminals.
DN2.xxx-DC24 24 VDC internal power supply. Replaces AC power supply. Accepts 18 V to 36 V DC input. Screw terminals
DN2.xxx-BTPWR Boot on Power On: the digitizerNETBOX/generatorNETBOX automatically boots if power is switched on.
Services
Order no. Option
DN2.xxx-Recal Recalibration of complete digitizerNETBOX/generatorNETBOX DN2 including calibration protocol
Standard SMA Cables
The standard adapter cables are based on RG174 cables and have a nominal attenuation of 0.3 dB/m at 100 MHz and 0.5 dB/m at
250 MHz. For high speed signals we recommend the low loss cables series CHF.
for Connections Connection Length to BNC male to BNC female to SMB female to MMCX male to SMA male
All SMA male 80 cm Cab-3mA-9m-80 Cab-3mA-9f-80 Cab-3f-3mA-80 Cab-1m-3mA-80 Cab-3mA-3mA-80
All SMA male 200 cm Cab-3mA-9m-200 Cab-3mA-9f-200 Cab-3f-3mA-200 Cab-1m-3mA-200 Cab-3mA-3mA-200
Probes (short) SMA male 5 cm Cab-3mA-9f-5
Low Loss SMA Cables
The low loss adapter cables are based on MF141 cables and have an attenuation of 0.3 dB/m at 500 MHz and 0.5 dB/m at 1.5 GHz.
They are recommended for signal frequencies of 200 MHz and above.
Order no. Option
CHF-3mA-3mA-200 Low loss cables SMA male to SMA male 200 cm
CHF-3mA-9m-200 Low loss cables SMA male to BNC male 200 cm
Technical changes and printing errors possible
SBench, digitizerNETBOX and generatorNETBOX are registered trademarks of Spectrum Instrumentation GmbH. Microsoft, Visual C++, Windows, Windows 98, Windows NT, Window 2000, Windows XP, Windows Vista,
Windows 7, Windows 8 and Windows 10 are trademarks/registered trademarks of Microsoft Corporation. LabVIEW, DASYLab, Diadem and LabWindows/CVI are trademarks/registered trademarks of National Instruments
Corporation. MATLAB is a trademark/registered trademark of The Mathworks, Inc. Delphi and C++Builder are trademarks/registered trademarks of Embarcadero Technologies, Inc. Keysight VEE, VEE Pro and VEE OneLab
are trademarks/registered trademarks of Keysight Technologies, Inc. FlexPro is a registered trademark of Weisang GmbH & Co. KG. PCIe, PCI Express and PCI-X and PCI-SIG are trademarks of PCI-SIG. LXI is a registered
trademark of the LXI Consortium. PICMG and CompactPCI are trademarks of the PCI Industrial Computation Manufacturers Group. Oracle and Java are registered trademarks of Oracle and/or its affiliates. Intel and Intel Core
i3, Core i5, Core i7, Core i9 and Xeon are trademarks and/or registered trademarks of Intel Corporation. AMD, Opteron, Sempron, Phenom, FX, Ryzen and EPYC are trademarks and/or registered trademarks of Advanced
Micro Devices. NVIDIA, CUDA, GeForce, Quadro and Tesla are trademarks/registered trademarks of NVIDIA Corporation.