hybridNETBOX　DN2.80_81x 16ビット、40MSs, 80MSs, 125MSs、2~8チャネル

hybridrNETBOX DN2.80/81x 16ビット、 40MS/s, 80MS/s, 125MS/s 2/4/8チャネル ➢ Gビットイーサネット接続 ➢ Host PCによるリモートコントロール ➢ 転送速度：70MB/s ➢ 分解能：16 ビット ➢ 2/4/8チャネル ➢ サンプリングレート：40MS/s, 125MS/s ➢ 帯域：20MHz, 70MHz ➢ データメモリ：512Mサンプル ➢ デジタイザ：6入力レンジ（±200mV～±10V) ➢ AWG出力振幅： 81シリーズ ±6V（50Ω負荷の場合）、 ± 12V（1MΩ負荷の場合） 80シリーズ ±3V（50Ω負荷の場合）、 ± 6V（1MΩ負荷の場合） ➢ 機能 : マルチレコーディング、Gstedレコーディング、繰り返し出力、タイムスタンプ、シーケンス出力 ➢ DC駆動オプション（12V/24V） 製品名 分解能 出力チャネル数 入力チャネル数 サンプリングレート 帯域 DN2.813-02 16 2 2 40MS/s 20MHz DN2.813-04 16 4 4 40MS/s 20MHz DN2.803-08 16 8 8 40MS/s 20MHz DN2.816-02 16 2 2 125MS/s 60MHz DN2.816-04 16 4 4 125MS/s 60MHz DN2.806-08 16 8 8 80MS/s 60MHz 4 4 125MS/s

DN2.80x/81x - hybridNETBOX up to 125 MS/s: Digitizer and AWG • Stimulus-Response, Closed-Loop, Recorder/Replay, Automated Tests, MIMO, ... • 2, 4 or 8 channels with 40 MS/s or 125 MS/s in both directions • Simultaneously sampling and generation on all channels • 512 MSample acquisition and 512 MSample AWG memory • Digitizer: single-ended or differential inputs • Digitizer: separate ADC and amplifier per channel • Digitizer: 6 input ranges: ±200 mV up to ±10 V • Digitizer: programmable input offset of ±100% • AWG: output into 50 Ohm up to ±3 V (8 channels) or ±6 V (2 and 4 channels) • AWG: output into 1 MOhm up to ±6 V (8 channels) or ±12 V (2 and 4 channels) • Streaming, Multiple Recording, Gated Sampling, Timestamps, Sequence Replay • Ethernet Remote Instrument • Direct Connection to PC/Laptop • LXI Core 2011 compatible • Connect anywhere in company LAN • GBit Ethernet Interface • Embedded Webserver for Maintenance/Updates • Sustained streaming mode up to 70 MB/s • Embedded Server option for open Linux platform Operating Systems SBench 6 Professional Included Drivers • Windows 7 (SP1), 8, 10, • Acquisition, Generation and Display of analog and • LabVIEW, MATLAB, LabWindows/CVI Server 2008 R2 and newer digital data • Visual C++, C++ Builder, GNU C++, • Linux Kernel 2.6, 3.x, 4.x, 5.x • Calculation, FFT VB.NET, C#, J#, Delphi, Java, Python • Windows/Linux 32 and 64 bit • Documentation and Import, Export • IVI General Information The hybridNETBOX DN2.80/81x series internally consists of a Digitizer and an AWG that can run together or independently. That allows simultaneous data generation and data acquisition for stimulus-response tests, ATE applications, MIMO applications or closed-loop applica- tions. Used independently, the digitizer can acquire test data in the field and the AWG can replay this test data in lab. The hybridNETBOX offers 16 bit resolution and is available with sampling rates of 40 MS/s and 125 MS/s. The hybridNETBOX can be installed anywhere in the company LAN and can be remotely controlled from a host PC. Digitizer Arbitrary Waveform Generator Internal Model Single-Ended Inputs Differential Inputs Outputs Output Level Star-Hub DN2.813-02 2 channels 40 MS/s 2 channels 40 MS/s 2 channels 40 MS/s ±6V (50Ω) ±12V (1MΩ) yes(1) (1)SBench 6 does not support star-hub for mixed digitizer and AWG. Instead DN2.813-04 4 channels 40 MS/s 4 channels 40 MS/s 4 channels 40 MS/s ±6V (50Ω) ±12V (1MΩ) yes(1) SBench 6 can only operate the cards independently by starting two DN2.803-08 8 channels 40 MS/s 8 channels 40 MS/s 8 channels 40 MS/s ±3V (50Ω) ±6V (1MΩ) yes(1) instances of the program DN2.816-02 2 channels 125 MS/s 2 channels 125 MS/s 2 channels 125 MS/s ±6V (50Ω) ±12V (1MΩ) yes(1) DN2.816-04 4 channels 125 MS/s 4 channels 125 MS/s 4 channels 125 MS/s ±6V (50Ω) ±12V (1MΩ) yes(1) DN2.806-08 8 channels 80 MS/s 8 channels 80 MS/s ±3V (50Ω) ±6V (1MΩ) yes(1) 4 channels 125 MS/s 4 channels 125 MS/s 4 channels 125 MS/sSPECTRUM INSTRUMENTATION GMBH · AHRENSFELDER WEG 13-17 · 22927 GROSSHANSDORF · GERMANY 11.9.2020 PHONE: +49 (0)4102-6956-0 · FAX: +49 (0)4102-6956-66 · E-MAIL: info@spec.de · INTERNET: www.spectrum-instrumentation.com

common measurement functions reducing the time needed to learn a new IVI instrument. Software Support The Spectrum products to be accessed with the IVI driver can be lo- cally installed data acquisition cards, remotely installed data acqui- Windows Support The digitizerNETBOX/generatorNETBOX/hybridNETBOX can be sition cards or remote LXI instruments like accessed from Windows 7, Windows 8,Windows 10 (each 32 bit digitizerNETBOX/generatorNETBOX. To maximize the compatibil- and 64 bit). Programming examples for Visual C++, C++ Builder, ity with existing IVI based software installations, the Spectrum IVI LabWindows/CVI, Delphi, Visual Basic, VB.NET, C#, J#, Python, driver supports IVI Scope, IVI Digitizer and IVI FGen class with IVI- Java and IVI are included. C and IVI-COM interfaces. Linux Support Third-party Software Products The digitizerNETBOX/generatorNET- Most popular third-party software products, such as LabVIEW, BOX/hybridNETBOX can be accessed from any Linux MATLAB or LabWindows/CVI are supported. All drivers come system. The Linux support includes SMP systems, 32 bit with examples and detailed documentation. and 64 bit systems, versatile programming examples for Gnu C++, Python as well as drivers for MATLAB for Linux. Embedded Webserver SBench 6, the powerful data acquisition and analysis software from The integrated webserver Spectrum is also included as a Linux version. follows the LXI standard and gathers information Discovery Protocol on the product, set up of The Discovery function the Ethernet configuration helps you to find and and current status. It also identify any Spectrum LXI allows the setting of a con- instruments, like the figuration password, ac- digitizerNETBOX and cess to documentation generatorNETBOX, avail- and updating of the com- able to your computer on the network. The Discovery function will plete instrument firmware, also locate any Spectrum card products that are managed by an including the embedded installed Spectrum Remote Server somewhere on the network. remote server and the webserver. After running the discovery function the card information is cached and can be directly accessed by SBench 6. Furthermore the quali- fied VISA address is returned and can be used by any software to access the remote instrument. SBench 6 Professional The digitizerNETBOX, generator- NETBOX and hybridNETBOX can be used with Spectrum’s powerful software SBench 6 – a Profession- al license for the software is al- ready installed in the box. SBench 6 supports all of the standard fea- tures of the instrument. It has a va- riety of display windows as well as analysis, export and documen- tation functions. • Available for Windows Windows 7, Windows 8, Windows 10 and Linux • Easy to use interface with drag and drop, docking windows and context menus • Display of analog and digital data, X-Y display, frequency domain and spread signals • Designed to handle several GBytes of data • Fast data preview functions • SBench 6 only supports either AWG or Digitizer in one pro- gram • Star-Hub for mixed mode applications is not supported • To run AWG and Digitizer with SBench 6, the software needs to be started twice and each instance of the program then oper- ates independetly one device IVI Driver The IVI standards define an open driver architecture, a set of instru- ment classes, and shared software components. Together these pro- vide critical elements needed for instrument interchangeability. IVI's defined Application Programming Interfaces (APIs) standardize

DC Power Supply Option The digitizerNETBOX/generatorNET- General Hardware features and options BOX can be equipped with an internal DC power supply which replaces the LXI Instrument standard AC power supply. Two dif- The digitizerNETBOX and ferent power supply options are avail- generatorNETBOX are fully able that range from 9V to 36V. LXI instrument compatible Contact the sales team if other DC lev- to LXI Core 2011 following els are required. the LXI Device Specification 2011 rev. 1.4. The digitizerNETBOX/generatorNETBOX has been Using the DC power supply the digitiz- tested and approved by the LXI Consortium. erNETBOX/generatorNETBOX can be used for mobile applications together with a Laptop in automotive or airborne applications. Located on the front panel is the main on/off switch, LEDs showing the LXI and Acquisition status and the LAN reset switch. Boot on Power Option The digitizerNETBOX/generatorNETBOX can be factory config- Chassis features ured to automatically start and boot upon availability of the input The chassis is especially power rail. That way the instrument will automatically become desigend for usage in dif- available again upon loss of input power. ferent application arreas and has some advanced Option Embedded Server features for mobile and shared usage: The option turns the digitizer- NETBOX/generatorNETBOX • stable metal chassis in a powerful PC that allows to • 8 bumper edges protect the chassis, the desk and other compo- run own programs on a small nents on it. The bumper edges allow to store the chassis either and remote data acquisition vertically or horizontally and the lock-in structure allows to stack system. The digitizerNET- multiple chassis with a secure fit onto each other. For 19“ rack BOX/generatorNETBOX is en- mount montage the bumpers can be unmounted and replaced hanced by more memory, a powerful CPU, a freely accessable by the 19“ rack mount option internal SSD and a remote software development access method. • The handle allows to easily carry the chassis around in juts one hand. The digitizerNETBOX/generatorNETBOX can either run connected • A standard GND screw on the back of the chassis allows to con- to LAN or it can run totally independent, storing data to the internal nect the metal chassis to measurement ground to reduce noise SSD. The original digitizerNETBOX/generatorNETBOX remote in- based on ground loops and ground level differences. strument functionality is still 100 % available. Running the embed- ded server option it is possible to pre-calculate results based on the acquired data, store acquisitions locally and to transfer just the re- Front Panel quired data or results parts in a client-server based software struc- Standard BNC connectors are used ture. A different example for the for all analog input or output sig- digitizerNETBOX/generatorNETBOX embedded server is surveil- nals and all auxiliary signals like lance/logger application which can run totally independent for clock and trigger. No special days and send notification emails only over LAN or offloads stored adapter cables are needed and the data as soon as it’s connected again. connection is secure even when used in a moving environment. Access to the embedded server is done through a standard text based Linux shell based on the ssh secure shell. Custom front panels are available on request even for small series, be it SMA, LEMO connectors or External clock I/O custom specific connectors. Using a dedicated connector a sampling clock can be fed in from an external system. It’s also possible to output the internally used Ethernet Connectivity sampling clock to synchronise external equipment to this clock. The GBit Ethernet connection can be used with standard COTS Ethernet Reference clock cabling. The integration into a stan- dard LAN allows to connect the The option to use a precise digitizerNETBOX/generatorNET- external reference clock BOX either directly to a desktop PC (normally 10 MHz) is nec- or Laptop or it is possible to place essary to synchronize the the instrument somewhere in the instrument for high-quality company LAN and access it from any desktop over the LAN. measurements with external equipment (like a signal source). It’s also possible to enhance the quality of the sampling clock in this way. The driver automatically generates the requested sampling clock from the fed in reference clock.

Pulse width Defines the minimum or maximum width that a trigger pulse must Digitizer Hardware Features and Options have to generate a trigger event. Pulse width can be combined with channel trigger, pattern trigger and external trigger. Input Amplifier The analog inputs can be adapt- Multiple Recording ed to real world signals using a The Multiple Recording wide variety of settings that are mode allows the recording of individual for each channel. By several trigger events with an using software commands the in- extremely short re-arming put termination can be changed time. The hardware doesn’t between 50 Ohm and 1 MOhm, one can select a matching input need to be restarted in be- range and the signal offset can be compensated for. tween. The on-board memory is divided in several segments of the same size. Each of them is filled with data if a trigger event occurs. Differential inputs Pre- and posttrigger of the segments can be programmed. The num- With a simple software command the inputs can individually be ber of acquired segments is only limited by the used memory and switched from single-ended (in relation to ground) to differential by is unlimited when using FIFO mode. combining each two single-ended inputs to one differential input. When the inputs are used in differential mode the A/D converter Gated Sampling measures the difference between two lines with relation to system The Gated Sampling mode ground. allows data recording con- trolled by an external gate Automatic on-board calibration signal. Data is only record- All of the channels are calibrated in factory before the board is ed if the gate signal has a shipped. To compensate for different variations like PC power sup- programmed level. In addi- ply, temperature and aging, the software driver provides routines tion a pre-area before start for an automatic onboard offset and gain calibration of all input of the gate signal as well as a post area after end of the gate signal ranges. All the cards contain a high precision on-board calibration can be acquired. The number of gate segments is only limited by reference. the used memory and is unlimited when using FIFO mode. Ring buffer mode Timestamp The ring buffer mode is the The timestamp function standard mode of all oscillo- writes the time positions of scope instruments. Digitized the trigger events in an extra data is continuously written memory. The timestamps are into a ring memory until a relative to the start of record- trigger event is detected. After the trigger, post-trigger samples are ing, a defined zero time, ex- recorded and pre-trigger samples can also be stored. The number ternally synchronized to a radio clock, an IRIG-B a GPS receiver. of pre-trigger samples available simply equals the total ring mem- Using the external synchronization gives a precise time relation for ory size minus the number of post trigger samples. acquisitions of systems on different locations. FIFO mode ABA mode The FIFO mode is designed for continuous data transfer between re- The ABA mode com- mote instrument and PC memory or hard disk. The control of the bines slow continuous data stream is done automatically by the driver on interrupt request. data recording with fast The complete installed on-board memory is used for buffer data, acquisition on trigger making the continuous streaming extremely reliable. events. The ABA mode works like a slow data Channel trigger logger combined with a The data acquisition instruments offer a wide variety of trigger fast digitizer. The exact modes. Besides the standard signal checking for level and edge as position of the trigger events is stored as timestamps in an extra known from oscilloscopes it’s also possible to define a window trig- memory. ger. All trigger modes can be combined with the pulsewidth trigger. This makes it possible to trigger on signal errors like too long or too short pulses. In addition to this a re-arming mode (for accurate trig- ger recognition on noisy signals) the AND/OR conjunction of dif- ferent trigger events is possible. As a unique feature it is possible to use deactivated channels as trigger sources. External trigger I/O All instruments can be triggered using an external TTL signal. It’s possible to use positive or negative edge also in combination with a programmable pulse width. An internally recognised trigger event can - when activated by software - be routed to the trigger connector to start external instruments.

a rearm trigger. The other input has one comparator that can be used for standard edge and level triggers. AWG Hardware Features and Options Singleshot output When singleshot output is activated the data of the on-board mem- ory is played exactly one time. The trigger source can be either one of the external trigger inputs or the software trigger. After the first trigger additional trigger events will be ignored. Repeated output When the repeated output mode is used the data of the on-board memory is played continuously for a programmed number of times or until a stop command is executed. The trigger source can be ei- ther one of the external trigger inputs or the software trigger. After the first trigger additional trigger events will be ignored. Single Restart replay When this mode is activated the data of the on-board memory will be replayed once after each trigger event. The trigger source can be either the external TTL trigger or software trigger. FIFO mode The FIFO mode is designed for continuous data transfer between PC memory or hard disk and the generation board. The control of the data stream is done automatically by the driver on an interrupt request basis. The complete installed on-board memory is used for buffering data, making the continuous streaming extremely reliable. Multiple Replay The Multiple Replay mode al- lows the fast output genera- tion on several trigger events without restarting the hard- ware. With this option very fast repetition rates can be achieved. The on-board memory is divided into several segments of the same size. Each segment can contain different data which will then be played with the occurrence of each trigger event. Gated Replay The Gated Sampling mode al- lows data replay controlled by an external gate signal. Data is only replayed if the gate signal has attained a programmed level. Sequence Mode The sequence mode allows to split the card memory into sev- eral data segments of different length. These data segments are chained up in a user chosen order using an additional sequence memory. In this sequence memory the number of loops for each seg- ment can be programmed and trigger conditions can be defined to proceed from segment to segment. Using the sequence mode it is also possible to switch between replay waveforms by a simple soft- ware command or to redefine waveform data for segments simulta- neously while other segments are being replayed. All trigger- related and software-command-related functions are only working on single cards, not on star-hub-synchrnonized cards. External trigger input All boards can be triggered using up to two external analog or dig- ital signals. One external trigger input has two analog comparators that can define an edge or window trigger, a hysteresis trigger or

hybridNETBOX Technical Data - Digitizer Analog Inputs Resolution 16 bit (can be reduced to acquire simultaneous digital inputs) Input Range software programmable ±200 mV, ±500 mV, ±1 V, ±2 V, ±5 V, ±10 V Input Type software programmable Single-ended or True Differential Input Offset (single-ended) software programmable programmable to ±100% of input range in steps of 1% ADC Differential non linearity (DNL) ADC only 591x: ±0.2/±0.8 LSB (typ./max.) 592x: ±0.2/±0.8 LSB (typ./max.) 593x, 8x3: ±0.5/±0.9 LSB (typ./max.) 594x: ±0.5/±0.9 LSB (typ./max.) 596x, 8x6: ±0.5/±0.9 LSB (typ./max. ADC Integral non linearity (INL) ADC only 591x: ±1.0/±2.3 LSB (typ./max.) 592x: ±1.0/±2.3 LSB (typ./max.) 593x, 803, 813: ±2.0/±7.5 LSB (typ./max.) 594x: ±2.0/±7.5 LSB (typ./max.) 596x, 806, 816: ±2.0/±7.5 LSB (typ./max.) Offset error (full speed), DC signal after warm-up and calibration ≤ 0.1% of range Gain error (full speed), DC signal after warm-up and calibration ≤ 0.1% of reading AC accuracy 1 kHz signal ≤ 0.3% of reading AC accuracy 50 kHz signal ≤ 0.5% of reading Crosstalk: Signal 1 MHz, 50 Ω range ≤ ±1V ≤ 95 dB on adjacent channels range ≥ ±2V ≤ 90 dB on adjacent channels Crosstalk: Signal 10 MHz, 50 Ω range ≤ ±1V ≤ 87 dB on adjacent channels range ≥ ±2V ≤ 85 dB on adjacent channels Analog Input impedance software programmable 50 Ω /1 MΩ || 30 pF Analog input coupling fixed DC Over voltage protection range ≤ ±1V ±5 V (1 MΩ), 3.5 Vrms (50 Ω) Over voltage protection range ≥ ±2V ±50 V (1 MΩ), 5 Vrms (50 Ω) Anti-Aliasing Filter (digital filtering active) 591x (5 MS/s) Digital Anti-Aliasing filter at 40% of sampling rate. Examples: 5 MS/s sampling rate -> anit-aliasing filter at 2 MHz 1 MS/s sampling rate -> anti-aliasing filter at 400 kHz Anti-Aliasing Filter (standard) 591x (5 MS/s) fixed 2.5 MHz 3rd order butterworth alike 592x (20 MS/s) fixed 10 MHz 3rd order butterworth alike 593x (40 MS/s) fixed 20 MHz 3rd order butterworth alike 594x (80 MS/s) fixed 40 MHz 3rd order butterworth alike 596x (125 MS/s) fixed 60 MHz 3rd order butterworth alike CMRR (Common Mode Rejection Ratio) range ≤ ±1V 100 kHz: 75 dB, 1 MHz: 60 dB, 10 MHz: 40 dB CMRR (Common Mode Rejection Ratio) range ≥ ±2V 100 kHz: 55 dB, 1 MHz: 52 dB, 10 MHz: 50 dB Maximum Common Mode Voltage Input Range ±200 mV ±500 mV ±1 V ±2 V ±5 V ±10 V Differential Input VCM ±900 mV ±2.25 V ±2.25 V ±9 V ±22.5 V ±22.5 V Channel selection (single-ended inputs) software programmable 1, 2, 4 or 8 channels (maximum is model dependent) Channel selection (true differential inputs) software programmable 1, 2 or 4 channels (maximum is model dependent) Trigger Available trigger modes software programmable Channel Trigger, External, Software, Window, Pulse, Re-Arm, Spike, Or/And, Delay Trigger level resolution software programmable 14 bit Trigger edge software programmable Rising edge, falling edge or both edges Trigger pulse width software programmable 0 to [4G - 1] samples in steps of 1 sample Trigger delay software programmable 0 to [4G - 1] samples in steps of 1 samples Trigger holdoff (for Multi, ABA, Gate) software programmable 0 to [4G - 1] samples in steps of 1 samples Multi, ABA, Gate: re-arming time < 40 samples (+ programmed pretrigger + programmed holdoff) Pretrigger at Multi, ABA, Gate, FIFO software programmable 8 up to [32 kSamples / number of active channels] in steps of 8 Posttrigger software programmable 8 up to [8G - 4] samples in steps of 8 (defining pretrigger in standard scope mode) Memory depth software programmable 16 up to [installed memory / number of active channels] samples in steps of 8 Multiple Recording/ABA segment size software programmable 8 up to [installed memory / number of active channels] samples in steps of 8 Internal/External trigger accuracy 1 sample Timestamp modes software programmable Standard, Startreset, external reference clock on X1 (e.g. PPS from GPS, IRIG-B) Data format Std., Startreset: 64 bit counter, increments with sample clock (reset manually or on start) RefClock: 24 bit upper counter (increment with RefClock) 40 bit lower counter (increments with sample clock, reset with RefClock) Extra data software programmable none, acquisition of X1/X2/X3 inputs at trigger time, trigger source (for OR trigger) Size per stamp 128 bit = 16 bytes External trigger Ext X1, X2, X3 External trigger type Single level comparator 3.3V LVTTL logic inputs External trigger impedance software programmable 50 Ω / 5 kΩ For electrical specifications refer to External trigger input level ±5 V (5 kΩ), ±2.5 V (50 Ω), „Multi Purpose I/O lines“ section. External trigger over voltage protection ±20 V (5 kΩ), 5 Vrms (50 Ω) External trigger sensitivity 200 mVpp (minimum required signal swing) External trigger level software programmable ±5 V in steps of 1 mV External trigger bandwidth 50 Ω DC to 400 MHz n.a. 5 kΩ DC to 300 MHz DC to 125 MHz Minimum external trigger pulse width ≥ 2 samples ≥ 2 samples

Multi Purpose I/O lines Number of multi purpose output lines one, named X0 Number of multi purpose input/output lines three, named X1, X2, X3 Multi Purpose line X0 X1, X2, X3 Input: available signal types software programmable n.a. Synchronous Digital-In, Asynchronous Digital-In, Timestamp Reference Clock, Logic trigger Input: signal levels n.a. 3.3 V LVTTL Input: impedance n.a. 10 kΩ to 3.3 V Input: maximum voltage level n.a. -0.5 V to +4.0 V Input: maximum bandwidth n.a. 125 MHz Output: available signal types software programmable Run-, Arm-, Trigger-Output, Run-, Arm-, Trigger-Output, Asynchronous Digital-Out, Asynchronous Digital-Out ADC Clock Output Output: impedance 50 Ω Output: drive strength Capable of driving 50 Ω loads, maximum drive strength ±48 mA Output: type / signal levels 3.3V LVTTL, TTL compatible for high impedance loads Output: update rate (synchronous modes) sampling clock Clock Clock Modes software programmable internal PLL, external clock, external reference clock, sync Internal clock range (PLL mode) software programmable see „Clock Limitations and Bandwidth“ table below Internal clock accuracy after warm-up ≤ ±1.0 ppm (at time of calibration in production) Internal clock aging ≤ ±0.5 ppm / year PLL clock setup granularity (int. or ext. reference) 1 Hz External reference clock range software programmable 128 kHz up to 125 MHz Direct external clock to internal clock delay 4.3 ns Direct external clock range see „Clock Limitations and Bandwidth“ table below Direct external clock minimum LOW/HIGH time see „Clock Limitations and Bandwidth“ table below External clock type Single level comparator External clock input level ±5 V (5 kΩ), ±2.5 V (50 Ω), External clock input impedance software programmable 50 Ω / 5 kΩ External clock over voltage protection ±20 V (5 kΩ), 5 Vrms (50 Ω) External clock sensitivity 200 mVpp (minimum required signal swing) External clock level software programmable ±5 V in steps of 1mV External clock edge rising edge used External reference clock input duty cycle 45% - 55% Clock output electrical specification Available via Multi Purpose output X0. Refer to „Multi Purpose I/O lines“ section. Synchronization clock multiplier „N“ for software programmable N being a multiplier (1, 2, 3, 4, 5, ... Max) of the card with the currently slowest sampling clock. different clocks on synchronized cards The card maximum (see „Clock Limitations and Bandwidth“ table below) must not be exceeded. ABA mode clock divider for slow clock software programmable 8 up to (64k - 8) in steps of 8 Channel to channel skew on one card < 200 ps (typical) Skew between star-hub synchronized cards < 100 ps (typical) Clock Limitations and Bandwidth M2p.591x, M2p.592x, M2p.593x M2p.594x M2p.596x DN2.591-xx DN2.592-xx DN2.593-xx DN2.596-xx DN6.591-xx DN6.592-xx DN6.593-xx DN6.596-xx DN2.803-xx DN2.806-xx DN2.813-xx DN2.816-xx max internal clock (non-synchronized cards) 5 MS/s 20 MS/s 40 MS/s 80 MS/s 125 MS/s min internal clock (non-synchronized cards) 1 kS/s 1 kS/s 1 kS/s 1 kS/s 1 kS/s max internal clock (cards synchronized via star-hub) 5 MS/s 20 MS/s 40 MS/s 80 MS/s 125 MS/s min internal clock (cards synchronized via star-hub) 128 kS/s 128 kS/s 128 kS/s 128 kS/s 128 kS/s max direct external clock 5 MS/s 20 MS/s 40 MS/s 80 MS/s 125 MS/s min direct external clock 1 MS/s 1 MS/s 1 MS/s 1 MS/s 1 MS/s min direct external clock LOW time 25 ns 25 ns 4 ns 4 ns 4 ns min direct external clock HIGH time 25 ns 25 ns 4 ns 4 ns 4 ns -3 dB analog input bandwidth > 2.0 MHz > 10 MHz > 20 MHz > 40 MHz > 60 MHz -3 dB analog input bandwidth, digital filter de-activated > 2.5 MHz n.a. n.a. n.a. n.a. RMS Noise Level (Zero Noise), typical figures M2p.591x, DN2.591-xx, DN6.591-xx digital filtering active Input Range ±200 mV ±500 mV ±1 ±2 V ±5 V ±10 V Voltage resolution 6.1 µV 15.3 µV 30.5 µV 61.0 µV 152.6 µV 305.2 µV 50 Ω <1.5 LSB <10 µV <1.2 LSB <19 µV <1.0 LSB <31 µV <3.0 LSB <183 µV <1.6 LSB <245 µV <1.2 LSB <367 µV 1 MΩ <1.5 LSB <10 µV <1.2 LSB <19 µV <1.0 LSB <31 µV <3.0 LSB <183 µV <1.6 LSB <245 µV <1.2 LSB <367 µV M2p.592x, DN2.592-xx, DN6.592-xx Input Range ±200 mV ±500 mV ±1 ±2 V ±5 V ±10 V Voltage resolution 6.1 µV 15.3 µV 30.5 µV 61.0 µV 152.6 µV 305.2 µV 50 Ω <4.0 LSB <25 µV <2.6 LSB <40 µV <2.1 LSB <65 µV <4.3 LSB <263 µV <2.6 LSB <397 µV <2.1 LSB <641 µV 1 MΩ <4.5 LSB <28 µV <3.0 LSB <46 µV <2.5 LSB <107 µV <4.5 LSB <275 µV <3.0 LSB <458 µV <2.5 LSB <763 µV

M2p.593x, DN2.593-xx, DN6.593-xx, DN2.803-xx, DN2.813-xx Input Range ±200 mV ±500 mV ±1 ±2 V ±5 V ±10 V Voltage resolution 6.1 µV 15.3 µV 30.5 µV 61.0 µV 152.6 µV 305.2 µV 50 Ω <6.0 LSB <37 µV <5.0 LSB <77 µV <4.5 LSB <138 µV <6.5 LSB <397 µV <5.0 LSB <763 µV <4.5 LSB <1.4 mV 1 MΩ <6.5 LSB <40 µV <5.0 LSB <77 µV <4.5 LSB <138 µV <6.5 LSB <397 µV <5.0 LSB <763 µV <4.5 LSB <1.4 mV M2p.594x Input Range ±200 mV ±500 mV ±1 ±2 V ±5 V ±10 V Voltage resolution 6.1 µV 15.3 µV 30.5 µV 61.0 µV 152.6 µV 305.2 µV 50 Ω <7.0 LSB <43 µV <5.5 LSB <85 µV <4.5 LSB <138 µV <7.5 LSB <458 µV <5.5 LSB <840 µV <4.5 LSB <1.4 mV 1 MΩ <7.5 LSB <46 µV <5.8 LSB <89 µV <4.5 LSB <138 µV <7.7 LSB <470 µV <5.8 LSB <886 µV <4.5 LSB <1.4 mV M2p.596x, DN2.596-xx, DN6.596-xx, DN2.806-xx, DN2.816-xx Input Range ±200 mV ±500 mV ±1 ±2 V ±5 V ±10 V Voltage resolution 6.1 µV 15.3 µV 30.5 µV 61.0 µV 152.6 µV 305.2 µV 50 Ω <9.0 LSB <55µV <6.8 LSB <104 µV <5.5 LSB <168 µV <9.0 LSB <550 µV <6.8 LSB <1.1 mV <5.5 LSB <1.7 mV 1 MΩ <9.5 LSB <58µV <7.1 LSB <109 µV <5.5 LSB <168 µV <9.5 LSB <580 µV <7.1 LSB <1.1 mV <5.5 LSB <1.7 mV Dynamic Parameters, typical figures M2p.591x, DN2.591-xx, DN6.591-xx digital filtering active Test - sampling rate 5 MS/s Input Range ±200 mV ±500 mV ±1 V ±2 V Test Signal Frequency 20 kHz 1 MHz 20 kHz 1 MHz 20 kHz 1 MHz 20 kHz 1 MHz SNR (typ) ≥ 83.5 dB ≥ 82.8 dB ≥ 85.0 dB ≥ 84.9 dB ≥ 86.2 dB ≥ 85.7 dB n.a. n.a. THD (typ) (≤ 84.4 dB) ≤ -93.5 dB (≤ 86.3 dB) ≤ -93.1 dB (≤ 86.9 dB) ≤ -91.8 dB n.a. n.a. SFDR (typ), excl. harm. ≥ 103.0 dB ≥ 103.0 dB ≥ 104.0 dB ≥ 107.0 dB ≥ 103.0 dB ≥ 107.0 dB n.a. n.a. ENOB (based on SNR) ≥ 13.6 LSB ≥ 13.4 LSB ≥ 13.8 LSB ≥ 13.8 LSB ≥ 14.0 LSB ≥ 13.9 LSB n.a. n.a. ENOB (based on SINAD) ≥ 13.1 LSB ≥ 13.4 LSB ≥ 13.4 LSB ≥ 13.7 LSB ≥ 13.6 LSB ≥ 13.8 LSB n.a. n.a. M2p.591x, DN2.591-xx, DN6.591-xx digital filtering active Test - sampling rate 3 MS/s 1 MS/s 500 kS/s 200 kS/s Input Range ±200 mV ±1 V ±200 mV ±1 V ±200 mV ±1 V ±200 mV ±1 V Test Signal Frequency 20 kHz 20 kHz 20 kHz 20 kHz Input bandwidth due to digital filter 1.2 MHz 400 kHz 200 klHz 80 kHz SNR (typ) ≥ 85.3 dB ≥ 86.6 dB ≥ 87.2 dB ≥ 89.1 dB ≥ 86.2 dB ≥ 89.7 dB ≥ 86.4 dB ≥ 89.4 dB THD (typ) (≤ 88.9 dB) (≤ -88.5 dB) (≤ 86.4 dB) (≤ -88.6 dB) (≤ 86.9 dB) (≤ -90.8 dB) (≤ 89.7 dB) (≤ -93.8 dB) SFDR (typ), excl. harm. ≥ 103.1 dB ≥ 103.6 dB ≥ 102.8 dB ≥ 105.6 dB ≥ 103.1 dB ≥ 103.1 dB ≥ 103.1 dB ≥ 103.5 dB ENOB (based on SNR) ≥ 13.9 LSB ≥ 14.1 LSB ≥ 14.2 LSB ≥ 14.5 LSB ≥ 14.0 LSB ≥ 14.6 LSB ≥ 14.1 LSB ≥ 14.6 LSB ENOB (based on SINAD) ≥ 13.5 LSB ≥ 13.7 LSB ≥ 13.6 LSB ≥ 14.0 LSB ≥ 13.6 LSB ≥ 14.2 LSB ≥ 13.8 LSB ≥ 14.3 LSB (20 kHz measurements are missing the correct bandpass filter and therefore show a larger THD that is coming from the generator) M2p.592x, DN2.592-xx, DN6.592-xx Test - sampling rate 20 MS/s Input Range ±200 mV ±500 mV ±1 V ±2 V Test Signal Frequency 1 MHz n.a. 1 MHz n.a. 1 MHz n.a. 1 MHz n.a. SNR (typ) ≥ 77.2 dB n.a. ≥ 79.8 dB n.a. ≥ 81.0 dB n.a. ≥ 75.0 dB n.a. THD (typ) ≤ 92.5 dB n.a. ≤ -92.8 dB n.a. ≤ -89.5 dB n.a. ≤ -76.5 dB n.a. SFDR (typ), excl. harm. ≥ 103.0 dB n.a. ≥ 103.0 dB n.a. ≥ 105.0 dB n.a. ≥ 93.0 dB n.a. ENOB (based on SNR) ≥ 12.5 LSB n.a. ≥ 13.0 LSB n.a. ≥ 13.2 LSB n.a. ≥ 12.2 LSB n.a. ENOB (based on SINAD) ≥ 12.5 LSB n.a. ≥ 13.0 LSB n.a. ≥ 13.1 LSB n.a. ≥ 11.8 LSB n.a. M2p.593x, DN2.593-xx, DN6.593-xx, DN2.803-xx, DN2.813-xx Test - sampling rate 40 MS/s Input Range ±200 mV ±500 mV ±1 ±2 V Test Signal Frequency 1 MHz 10 MHz 1 MHz 10 MHz 1 MHz 10 MHz 1 MHz 10 MHz SNR (typ) ≥ 73.0 dB ≥ 72.6 dB ≥ 74.6 dB ≥ 74.4 dB ≥ 75.3 dB ≥ 75.3 dB ≥ 71.9 dB ≥ 71.8 dB THD (typ) ≤ -87.8 dB ≤ -67.0 dB ≤ -89.0 dB ≤ -67.0 dB ≤ -86.1 dB ≤ -67.2 dB ≤ -79.0 dB ≤ -67.2 dB SFDR (typ), excl. harm. ≥ 98.3 dB ≥ 96.5 dB ≥ 98.8 dB ≥ 99.5 dB ≥ 101.0 dB ≥ 100.0 dB ≥ 81.7 dB ≥ 91.3 dB ENOB (based on SNR) ≥ 11.8 LSB ≥ 11.8 LSB ≥ 12.1 LSB ≥ 12.0 LSB ≥ 12.2 LSB ≥ 12.2 LSB ≥ 11.7 LSB ≥ 11.6 LSB ENOB (based on SINAD) ≥ 11.8 LSB ≥ 10.7 LSB ≥ 12.1 LSB ≥ 10.7 LSB ≥ 12.2 LSB ≥ 10.8 LSB ≥ 11.6 LSB ≥ 10.7 LSB M2p.594x Test - sampling rate 80 MS/s Input Range ±200 mV ±500 mV ±1 ±2 V Test Signal Frequency 1 MHz 10 MHz 1 MHz 10 MHz 1 MHz 10 MHz 1 MHz 10 MHz SNR (typ) ≥ 70.6 dB ≥ 70.5 dB ≥ 72.9 dB ≥ 72.8 dB ≥ 74.2 dB ≥ 74.2 dB ≥ 69.8 dB ≥ 69.8 dB THD (typ) ≤ -87.3 dB ≤ -76.9 dB ≤ -86.6 dB ≤ -76.3 dB ≤ -84.8 dB ≤ -70.1 dB ≤ -79.0 dB ≤ -77.9 dB SFDR (typ), excl. harm. ≥ 97.5 dB ≥ 105.0 dB ≥ 101.0 dB ≥ 104.0 dB ≥ 100.0 dB ≥ 100.0 dB ≥ 96.9 dB ≥ 96.6 dB

M2p.594x ENOB (based on SNR) ≥ 11.4 LSB ≥ 11.4 LSB ≥ 11.8 LSB ≥ 11.8 LSB ≥ 12.0 LSB ≥ 12.0 LSB ≥ 11.2 LSB ≥ 11.2 LSB ENOB (based on SINAD) ≥ 11.4 LSB ≥ 11.3 LSB ≥ 11.8 LSB ≥ 11.5 LSB ≥ 12.0 LSB ≥ 11.1 LSB ≥ 11.2 LSB ≥ 11.2 LSB M2p.596x, DN2.596-xx, DN6.596-xx, DN2.806-xx, DN2.816-xx Test - sampling rate 125 MS/s Input Range ±200 mV ±500 mV ±1 V ±2 V Test Signal Frequency 1 MHz 10 MHz 40 MHz 1 MHz 10 MHz 40 MHz 1 MHz 10 MHz 40 MHz 1 MHz 10 MHz 40 MHz SNR (typ) ≥ 68.1 dB ≥ 66.2 dB ≥ 65.5 dB ≥ 70.5 dB ≥ 69.9 dB ≥ 68.7 dB ≥ 73.3 dB ≥ 72.7 dB ≥ 71.5 dB ≥ 67.8 dB ≥ 65.8 dB ≥ 65.1 dB THD (typ) ≤ -81.5 dB ≤ -74.5 dB ≤ -53.7 dB ≤ -82.5 dB ≤ -77.6 dB ≤ -55.3 dB ≤ -83.3 dB ≤ -68.9 dB ≤ -57.3 dB ≤ -78.0 dB ≤ -75.6 dB ≤ -53.7 dB SFDR (typ), excl. harm. ≥ 95.0 dB ≥ 93.4 dB ≥ 92.3 dB ≥ 97.5 dB ≥ 96.8 dB ≥ 94.0 dB ≥ 98.5 dB ≥ 98.1 dB ≥ 96.4 dB ≥ 91.5 dB ≥ 89.0 dB ≥ 89.0 dB ENOB (based on SNR) ≥ 11.0 LSB ≥ 10.7 LSB ≥ 10.6 LSB ≥ 11.4 LSB ≥ 11.3 LSB ≥ 11.1 LSB ≥ 11.8 LSB ≥ 11.8 LSB ≥ 11.6 LSB ≥ 11.0 LSB ≥ 10.6 LSB ≥ 10.5 LSB ENOB (based on SINAD) ≥ 11.0 LSB ≥ 10.6 LSB ≥ 8.6 LSB ≥ 11.4 LSB ≥ 11.1 LSB ≥ 8.9 LSB ≥ 11.7 LSB ≥ 11.0 LSB ≥ 9.2 LSB ≥ 10.9 LSB ≥ 10.6 LSB ≥ 8.6 LSB Dynamic parameters are measured at ±1 V input range (if no other range is stated) and 50Ω termination with the samplerate specified in the table. Measured parameters are averaged 20 times to get typical values. Test signal is a pure sine wave generated by a signal generator and a matching bandpass filter. Amplitude is >99% of FSR. SNR and RMS noise parameters may differ depending on the quality of the used PC. SNR = Signal to Noise Ratio, THD = Total Harmonic Distortion, SFDR = Spurious Free Dynamic Range, SINAD = Signal Noise and Dis- tortion, ENOB = Effective Number of Bits. Connectors Analog Inputs 9 mm BNC female (one for each single-ended input) Cable-Type: Cab-9m-xx-xx Trigger Input 9 mm BNC female Cable-Type: Cab-9m-xx-xx Clock/Reference Clock Input 9 mm BNC female Cable-Type: Cab-9m-xx-xx Clock Output, Multi-Purpose X0 9 mm BNC female Cable-Type: Cab-9m-xx-xx Multi-Purpose I/O X1, X2, X3 Programmable Direction 9 mm BNC female Cable-Type: Cab-9m-xx-xx

hybridNETBOX Technical Data - Arbitrary Waveform Generator Analog Outputs Resolution 16 bit D/A Interpolation no interpolation Output amplitude software programmable 653x and 656x: ±1 mV up to ±3 V in 1 mV steps into 50 Ω termination (resulting in ±2 mV up to ±6 V in 2mV steps into high impedance loads) 654x and 657x: ±1 mV up to ±6 V in 1 mV steps into 50 Ω termination (resulting in ±2 mV up to ±12 V in 2mV steps into high impedance loads) Note: Gain values below ±300 mV into 50 Ω are reduced by digital scaling of the samples Output Amplifier Path Selection automatically by driver Low Power path: Selected Gain of ±1 mV to ±960 mV (into 50 Ω) High Power path: 653x and 656x: Selected Gain of ±940 mV to ±3 V (into 50 Ω) 654x and 657x: Selected Gain of ±940 mV to ±6 V (into 50 Ω) Output Amplifier Setting Hysteresis automatically by driver 940 mV to 960 mV (if output is using low power path it will switch to high power path at 960 mV. If output is using high power path it will switch to low power path at 940 mV) Output amplifier path switching time 1.2 ms (output disabled while switching) Output offset software programmable Low Power path: ±960 mV in 1 mV steps into 50 Ω (±1920 mV in 2 mV steps into 1 MΩ) High Power path: 653x and 656x: ±3 V in 1 mV steps into 50 Ω (±6V in 2 mV steps into 1 MΩ) 654x and 657x: ±6 V in 1 mV steps into 50 Ω (±12V in 2 mV steps into 1 MΩ) Filters software programmable One of 4 different filters (refer to „Bandwidth and Filters“ section) DAC Differential non linearity (DNL) DAC only ±2.0 LSB typical DAC Integral non linearity (INL) DAC only ±4.0 LSB typical Output resistance 50 Ω Minimum output load 653x and 656x: 0 Ω (short circuit safe by design) 654x and 657x: 50 Ω (short circuit safe by hardware supervisor, outputs will turn off) Max output swing in 50 Ω 653x and 656x: ±3.0 V (offset + amplitude) 654x and 657x: ±6.0 V (offset + amplitude) Max output swing in 1 MΩ 653x and 656x: ±6.0 V (offset + amplitude) 654x and 657x: ±12.0 V (offset + amplitude) Max output current 653x and 656x: ±30 mA 654x and 657x: ±60 mA Slewrate (using Filter 0) Low power path (0 to 900 mV): 250 mV/ns 653x and 656x: High power path (0 to 3000 mV): 850 mV/ns 654x and 657x: High power path (0 to 6000 mV): TBD Rise/Fall time 10% to 90% square wave 653x and 656x: ±3 V square wave: 5.3 ns 654x and 657x: ±3 V square wave: TBD Crosstalk @ 1 MHz signal ±3 V 1 to 4 ch standard AWG 95 dB (M2p.6530, M2p.6531, M2p.6536, M2p.6560, M2p.6561, M2p.6566) Crosstalk @ 1 MHz signal ±3 V 8 channel AWG 84 dB (M2p.6533, M2p.6568) Crosstalk @ 1 MHz signal ±6 V 1 to 4 ch high-voltage AWG 99 dB (M2p.6540, M2p.6541, M2p.6546, M2p.6540, M2p.6541, M2p.6546) Output accuracy ±1 mV ±0.5 % of programmed output amplitude ±0.1 % of programmed output offset Trigger Available trigger modes software programmable External, Software, Pulse, Or/And, Delay Trigger edge software programmable Rising edge, falling edge or both edges Trigger pulse width software programmable 0 to [4G - 1] samples in steps of 1 sample Trigger delay software programmable 0 to [4G - 1] samples in steps of 1 samples Trigger holdoff (for Multi, Gate) software programmable 0 to [4G - 1] samples in steps of 1 samples Multi, Gate: re-arming time < 24 samples (+ programmed holdoff) Trigger to Output Delay 63 sample clocks + 7 ns Memory depth software programmable 16 up to [installed memory / number of active channels] samples in steps of 8 Multiple Replay segment size software programmable 8 up to [installed memory / number of active channels] samples in steps of 8 External trigger accuracy 1 sample External trigger Ext X1, X2, X3 External trigger type Single level comparator 3.3V LVTTL logic inputs External trigger impedance software programmable 50 Ω / 5 kΩ For electrical specifications refer to External trigger input level ±5 V (5 kΩ), ±2.5 V (50 Ω), „Multi Purpose I/O lines“ section. External trigger over voltage protection ±20 V (5 kΩ), 5 Vrms (50 Ω) External trigger sensitivity 200 mVpp (minimum required signal swing) External trigger level software programmable ±5 V in steps of 1 mV External trigger bandwidth 50 Ω DC to 400 MHz n.a. 5 kΩ DC to 300 MHz DC to 125 MHz Minimum external trigger pulse width ≥ 2 samples ≥ 2 samples

Multi Purpose I/O lines Number of multi purpose output lines one, named X0 Number of multi purpose input/output lines three, named X1, X2, X3 Multi Purpose line X0 X1, X2, X3 Input: available signal types software programmable n.a. Asynchronous Digital-In, Logic trigger Input: signal levels n.a. 3.3 V LVTTL Input: impedance n.a. 10 kΩ to 3.3 V Input: maximum voltage level n.a. -0.5 V to +4.0 V Input: maximum bandwidth n.a. 125 MHz Output: available signal types software programmable Run-, Arm-, Trigger-Output, Run-, Arm-, Trigger-Output, Marker-Output, Synchronous Digital-Out, Marker-Output, Synchronous Digital-Out, Asynchronous Digital-Out Asynchronous Digital-Out, ADC Clock Output, Output: impedance 50 Ω Output: drive strength Capable of driving 50 Ω loads, maximum drive strength ±48 mA Output: type / signal levels 3.3V LVTTL, TTL compatible for high impedance loads Output: update rate (synchronous modes) sampling clock Sequence Replay Mode Number of sequence steps software programmable 1 up to 4096 (sequence steps can be overloaded at runtime) Number of memory segments software programmable 2 up to 64k (segment data can be overloaded at runtime) Minimum segment size software programmable 32 samples in steps of 8 samples. Maximum segment size software programmable 512 MS / active channels / number of sequence segments (round up to the next power of two) Loop Count software programmable 1 to (1M - 1) loops Sequence Step Commands software programmable Loop for #Loops, Next, Loop until Trigger, End Sequence Special Commands software programmable Data Overload at runtime, sequence steps overload at runtime, readout current replayed sequence step Limitations for synchronized products Software commands changing the sequence as well as „Loop until trigger“ are not synchronized between cards. This also applies to multiple AWG modules in a generatorNETBOX. Clock Clock Modes software programmable internal PLL, external clock, external reference clock, sync Internal clock range (PLL mode) software programmable see „Clock Limitations“ table below Internal clock accuracy after warm-up ≤ ±1.0 ppm (at time of calibration in production) Internal clock aging ≤ ±0.5 ppm / year PLL clock setup granularity (int. or ext. reference) 1 Hz External reference clock range software programmable 128 kHz up to 125 MHz Direct external clock to internal clock delay 4.3 ns Direct external clock range see „Clock Limitations and Bandwidth“ table below External clock type Single level comparator External clock input level ±5 V (5 kΩ), ±2.5 V (50 Ω), External clock input impedance software programmable 50 Ω / 5 kΩ External clock over voltage protection ±20 V (5 kΩ), 5 Vrms (50 Ω) External clock sensitivity 200 mVpp (minimum required signal swing) External clock level software programmable ±5 V in steps of 1mV External clock edge rising edge used External reference clock input duty cycle 45% - 55% Clock output electrical specification Available via Multi Purpose output X0. Refer to „Multi Purpose I/O lines“ section. Synchronization clock multiplier „N“ for software programmable N being a multiplier (1, 2, 3, 4, 5, ... Max) of the card with the currently slowest sampling clock. different clocks on synchronized cards The card maximum (see „Clock Limitations and Bandwidth“ table below) must not be exceeded. Channel to channel skew on one card < 200 ps (typical) Skew between star-hub synchronized cards TBD Clock Limitations M2p.653x M2p.656x DNx.653-xx DNx.656-xx M2p.654x M2p.657x DNx.654-xx DNx.657-xx DNx.803-xx DNx.806-xx DNx.813-xx DNx.816-xx max internal clock (non-synchronized cards) 40 MS/s 125 MS/s min internal clock (non-synchronized cards) 1 kS/s 1 kS/s max internal clock (cards synchronized via star-hub) 40 MS/s 125 MS/s min internal clock (cards synchronized via star-hub) 128 kS/s 128 kS/s max direct external clock 40 MS/s 125 MS/s min direct external clock DC DC min direct external clock LOW time 4 ns 4 ns min direct external clock HIGH time 4 ns 4 ns

Bandwidth and Filters Filter - 3dB bandwidth Filter characteristic Analog bandwidth does not include Sinc response of DAC Filter 0 70 MHz third-order Butterworth Filter 1 20 MHz fifth-order Butterworth Filter 2 5 MHz fourth-order Bessel Filter 3 1 MHz fourth-order Bessel Dynamic Parameters M2p.653x/DNx.653-xx/DNx.803-xx Test - Samplerate 40 MS/s 40 MS/s Output Frequency 800 kHz 4 MHz Output Level in 50 Ω ±900mV ±3000mV ±900mV ±3000mV Used Filter 1 MHz 5 MHz NSD (typ) -142 dBm/Hz -132 dBm/Hz -142 dBm/Hz -132 dBm/Hz SNR (typ) 90.7 dB 91.1 dB 83.7 dB 84.1 dB THD (typ) -74.0 dB -74.0 dB -70.5 dB -70.5 dB SINAD (typ) 73.9 dB 73.9 dB 69.8 dB 69.8 dB SFDR (typ), excl harm. 97.0 dB 95.0 dB 88.0 dB 88.0 dB ENOB (SINAD) 12.0 12.0 11.3 11.3 ENOB (SNR) 14.7 14.8 13.5 13.6 M2p.654x/DNx.654-xx/DNx.813-xx Test - Samplerate 40 MS/s 40 MS/s Output Frequency 800 kHz 4 MHz Output Level in 50 Ω ±900mV ±6000mV ±900mV ±6000mV Used Filter 1 MHz 5 MHz NSD (typ) -138 dBm/Hz -129 dBm/Hz -142 dBm/Hz -126 dBm/Hz SNR (typ) 86.7 dB 88.1 dB 83.7 dB 84.2 dB THD (typ) -74.0 dB -74.0 dB -74.0 dB -74.0 dB SINAD (typ) 73.8 dB 73.8 dB 73.6 dB 73.6 dB SFDR (typ), excl harm. ENOB (SINAD) 12.0 12.0 11.9 11.9 ENOB (SNR) 14.1 14.3 13.6 13.7 M2p.656x/DNx.656-xx/DNx.806-xx Test - Samplerate 125 MS/s 125 MS/s 125 MS/s Output Frequency 800 kHz 4 MHz 16 MHz Used Filter 1 MHz 5 MHz 20 MHz Output Level in 50 Ω ±900mV ±3000mV ±900mV ±3000mV ±900mV ±3000mV NSD (typ) -142 dBm/Hz -132 dBm/Hz -142 dBm/Hz -132 dBm/Hz -142 dBm/Hz -132 dBm/Hz SNR (typ) 90.7 dB 91.1 dB 83.7 dB 84.1 dB 77.7 dB 78.1 dB THD (typ) -74.0 dB -74.0 dB -70.5 dB -70.5 dB -66.0 dB -61.9 dB SINAD (typ) 73.9 dB 73.9 dB 69.8 dB 69.8 dB 65.7 dB 60.9 dB SFDR (typ), excl harm. 97.0 dB 95.0 dB 88.0 dB 88.0 dB 90.0 dB 89.0 dB ENOB (SINAD) 12.0 12.0 11.3 11.3 10.6 9.8 ENOB (SNR) 14.7 14.8 13.5 13.6 12.5 12.6 M2p.657x/DNx.657-xx/DNx.816-xx Test - Samplerate 125 MS/s 125 MS/s 125 MS/s Output Frequency 800 kHz 4 MHz 16 MHz Used Filter 1 MHz 5 MHz 20 MHz Output Level in 50 Ω ±900mV ±6000mV ±900mV ±6000mV ±900mV ±6000mV NSD (typ) -138 dBm/Hz -129 dBm/Hz -142 dBm/Hz -126 dBm/Hz -142 dBm/Hz -127 dBm/Hz SNR (typ) 86.7 dB 88.1 dB 83.7 dB 84.2 dB 77.7 dB 79.1 dB THD (typ) -74.0 dB -74.0 dB -74.0 dB -74.0 dB -70.5 dB -63.1 dB SINAD (typ) 73.8 dB 73.8 dB 73.6 dB 73.6 dB 69.7 dB 63.0 dB SFDR (typ), excl harm. ENOB (SINAD) 12.0 12.0 11.9 11.9 11.3 10.2 ENOB (SNR) 14.1 14.3 13.6 13.7 12.6 12.8 THD and SFDR are measured at the given output level and 50 Ohm termination with a high resolution M3i.4860/M4i.4450-x8 data acquisition card and are calculated from the spec- trum. Noise Spectral Density is measured with built-in calculation from an HP E4401B Spectrum Analyzer. All available D/A channels are activated for the tests. SNR and SFDR figures may differ depending on the quality of the used PC. NSD = Noise Spectral Density, THD = Total Harmonic Distortion, SFDR = Spurious Free Dynamic Range.

hybridNETBOX Technical Data - General Option digitizerNETBOX/generatorNETBOX embedded server (DN2.xxx-Emb, DN6.xxx-Emb) CPU Intel Quad Core 2 GHz System memory 4 GByte RAM System data storage Internal 128 GByte SSD Development access Remote Linux command shell (ssh), no graphical interface (GUI) available Accessible Hardware Full access to Spectrum instruments, LAN, front panel LEDs, RAM, SSD Integrated operating system OpenSuse 12.2 with kernel 4.4.7. Internal PCIe connection DN2.20, DN2.46, DN2.47, DN2.49, DN2.59, DN2.60, DN2.65 PCIe x1, Gen1 DN6.46, DN6.49, DN6.59, DN6.65 DN2.22, DN2.44, DN2.66 PCIe x1, Gen2 DN6.22, DN6.44, DN6.66 Ethernet specific details LAN Connection Standard RJ45 LAN Speed Auto Sensing: GBit Ethernet, 100BASE-T, 10BASE-T LAN IP address programmable DHCP (IPv4) with AutoIP fall-back (169.254.x.y), fixed IP (IPv4) Sustained Streaming speed DN2.20, DN2.46, DN2.47, DN2.49, DN2.60 up to 70 MByte/s DN6.46, DN6.49 DN2.59, DN2.65, DN2.22, DN2.44, DN2.66 up to 100 MByte/s DN6.59, DN6.65, DN6.22, DN6.44, DN6.66 Used TCP/UDP Ports Webserver: 80 mDNS Daemon: 5353 VISA Discovery Protocol: 111, 9757 UPNP Daemon: 1900 Spectrum Remote Server: 1026, 5025 Power connection details Mains AC power supply Input voltage: 100 to 240 VAC, 50 to 60 Hz AC power supply connector IEC 60320-1-C14 (PC standard coupler) Power supply cord power cord included for Schuko contact (CEE 7/7) Serial connection details (DN2.xxx with hardware ≥ V11) Serial connection (RS232) For diagnostic purposes only. Do not use, unless being instructed by a Spectrum support agent. Certification, Compliance, Warranty EMC Immunity Compliant with CE Mark EMC Emission Compliant with CE Mark Product warranty 5 years starting with the day of delivery Software and firmware updates Life-time, free of charge DN2 specific Technical Data Environmental and Physical Details DN2.xxx Dimension of Chassis without connectors or bumpers L x W x H 366 mm x 267 mm x 87 mm Dimension of Chassis with 19“ rack mount option L x W x H 366 mm x 482.6 mm x 87 mm (2U height) Weight (1 internal acquisition/generation module) 6.3 kg, with rack mount kit: 6.8 kg Weight (2 internal acquisition/generation modules) 6.7 kg, with rack mount kit 7.2 kg Warm up time 20 minutes Operating temperature 0°C to 40°C Storage temperature -10°C to 70°C Humidity 10% to 90% Dimension of packing (single DN2) L x W x H 470 mm x 390 mm x 180 mm Volume weight of Packing (single DN2) 7.0 kgs Power Consumption 230 VAC 12 VDC 24 VDC 2 + 2 channel versions 4 + 4 channel versions 8 + 8 channel versions MTBF MTBF TBD

Block diagram of hybridNETBOX DN2 • The number of maximum channels and internal digitizer modules and existance of a synchronization Star-Hub is model dependent. Block diagram of Digitizer Module hybridNETBOX DN2.80x/81x

Block diagram of AWG Module hybridNETBOX DN2.80x/81x

Order Information The hybridNETBOX is equipped with a large internal memory for data storage and data replay. The internal digitizer supports standard ac- quisition (Scope), FIFO acquisition (streaming), Multiple Recording, Gated Sampling, ABA mode and Timestamps. Then internal AWG sup- ports standard replay, FIFO replay (streaming), Multiple Replay, Gated Replay, Continuous Replay (Loop), Single-Restart as well as Sequence. Operating system drivers for Windows/Linux 32 bit and 64 bit, drivers and examples for C/C++, IVI (Scope, Digitizer and Function Gener- ator class), LabVIEW (Windows), MATLAB (Windows and Linux), .NET, Delphi, Java, Python and a Professional license of the oscilloscope software SBench 6 are included. The system is delivered with a connection cable meeting your countries power connection. Additional power connections with other standards are available as option. h ybridNETBOX DN2 - Ethernet/LXI Interface Inputs Outputs Order no. Memory Single-Ended Differential Channels Level@50Ω Level@1MΩ DN2.813-02 2 x 512 MSamples 2 x 40 MS/s 2 x 40 MS/s 2 x 40 MS/s ±6 V ±12 V DN2.813-04 2 x 512 MSamples 8 x 40 MS/s 4x 40 MS/s 8 x 40 MS/s ±6 V ±12 V DN2.803-08 2 x 512 MSamples 8 x 40 MS/s 4 x 40 MS/s 8 x 40 MS/s ±3 V ±6 V DN2.816-02 2 x 512 MSamples 2 x 125 MS/s 2 x 125 MS/s 2 x 125 MS/s ±6 V ±12 V DN2.816-04 2 x 512 MSamples 4 x 125 MS/s 4 x 125 MS/s 4 x 125 MS/s ±6 V ±12 V DN2.806-08 2 x 512 MSamples 4 x 125 MS/s 4 x 125 MS/s 4 x 125 MS/s ±3 V ±6 V 8 x 80 MS/s 8 x 80 MS/s Options Order no. Option DN2.xxx-Rack 19“ rack mounting set for self mounting DN2.xxx-Emb Extension to Embedded Server: CPU, more memory, SSD. Access via remote Linux secure shell (ssh) DN2.xxx-DC12 12 VDC internal power supply. Replaces AC power supply. Accepts 9 V to 18 V DC input. Screw terminals. DN2.xxx-DC24 24 VDC internal power supply. Replaces AC power supply. Accepts 18 V to 36 V DC input. Screw terminals DN2.xxx-BTPWR Boot on Power On: the digitizerNETBOX/generatorNETBOX/hybridNETBOX automatically boots if power is switched on. Calibration Order no. Option DN2.xxx-Recal Recalibration of complete digitizerNETBOX/generatorNETBOX/hybridNETBOX DN2 including calibration protocol BNC Cables The standard adapter cables are based on RG174 cables and have a nominal attenuation of 0.3 dB/m at 100 MHz. for Connections Connection Length to SMA male to SMA female to BNC male to SMB female All BNC male 80 cm Cab-9m-3mA-80 Cab-9m-3fA-80 Cab-9m-9m-80 Cab-9m-3f-80 All BNC male 200 cm Cab-9m-3mA-200 Cab-9m-3fA-200 Cab-9m-9m-200 Cab-9m-3f-200 Technical changes and printing errors possible SBench, digitizerNETBOX and generatorNETBOX are registered trademarks of Spectrum Instrumentation GmbH. Microsoft, Visual C++, Windows, Windows 98, Windows NT, Window 2000, Windows XP, Windows Vista, Windows 7, Windows 8 and Windows 10 are trademarks/registered trademarks of Microsoft Corporation. LabVIEW, DASYLab, Diadem and LabWindows/CVI are trademarks/registered trademarks of National Instruments Corporation. MATLAB is a trademark/registered trademark of The Mathworks, Inc. Delphi and C++Builder are trademarks/registered trademarks of Embarcadero Technologies, Inc. Keysight VEE, VEE Pro and VEE OneLab are trademarks/registered trademarks of Keysight Technologies, Inc. FlexPro is a registered trademark of Weisang GmbH & Co. KG. PCIe, PCI Express and PCI-X and PCI-SIG are trademarks of PCI-SIG. LXI is a registered trademark of the LXI Consortium. PICMG and CompactPCI are trademarks of the PCI Industrial Computation Manufacturers Group. Oracle and Java are registered trademarks of Oracle and/or its affiliates. Intel and Intel Core i3, Core i5, Core i7, Core i9 and Xeon are trademarks and/or registered trademarks of Intel Corporation. AMD, Opteron, Sempron, Phenom, FX, Ryzen and EPYC are trademarks and/or registered trademarks of Advanced Micro Devices. NVIDIA, CUDA, GeForce, Quadro and Tesla are trademarks/registered trademarks of NVIDIA Corporation.